Voltage Amplification:

The graph in figure below shows the drain channel current, I_D like a function of the gate bias voltage E_G for a theoretical n-channel JFET whenever no signal is applied to the gate electrode. The drain voltage E_D is supposed to be constant.

Whenever E_G is pretty negative and large, the JFET is pinched off, and no current flows via the channel. Since E_G acquires less negative, the channel open up, and current begins flowing. As E_G acquires still less negative, the channel gets broader, and the current I_D rises. Since E_G approaches the point where the source-gate (S-G) junction is at forward breakover, the channel conducts and also it possibly can. When E_G become positive sufficient, therefore the S-G junction conducts, and the JFET no longer works correctly. Some of the current in the channel is shunted via the gate. This is similar to a garden hose springing a leak.

The best amplification for weak signals is acquired whenever E_G is such that the slope of the curve in figure below is steepest. This is shown approximately by the range marked X in the graph. For power amplification, outcomes are frequently best whenever the JFET is biased at or beyond pinch off, in the variety marked Y.

Figure: Associative drain current as a function of gate voltage in a hypothetical n-channel JFET.