Kirchhoff’s Voltage Law (KVL)

It defines that in a closed circuit, the algebraic sum or total of all source voltages should be equivalent to the algebraic sum of all the voltage drops. The voltage drop is encountered whenever current flows in an element (i.e., resistance or load) from the higher-potential terminal to the lower potential terminal. The voltage rise is encountered whenever current flows in an element (i.e., voltage source) from lower potential terminal (or negative terminal of voltage source) toward the higher potential terminal (or positive terminal of voltage source). The Kirchhoff’s voltage law is described with the help of figure shown below.   

KVL equation for the circuit shown in figure shown below is stated as (i.e., we walk in clockwise direction beginning from the voltage source V and return to the same point).

                                           V1-IR1-IR2-V2-IR3-IR4+V3-IR5-V4 = 0

                                           V1-V2+V3-V4 = IR1+IR2+IR3+IR4+IR5

                                  Figure: Illustrates of Kirchhoff’s voltage law

Example:

For the circuit shown in figure below, compute the potential of points A, B, C, and E with respect to the point D. Also determine the value of voltage source V₁.

Solution:

Let us suppose we move in a clockwise direction about the close path D-E-A-B-C-D and acknowledged the points below. 

• 50 volt source is linked among the terminals D & E and this points out that the point E is lower potential than D. Therefore, V_ED (that is, this means potential of E with respect to D) is -50 volt and likewise V_CD = 50 volt or V_DC = -50 volt.

• 500 mA current is flowing via 200 Ω resistor from A to E and this means that point A is at higher potential than E. When we move from lower potential (E) to higher potential (A), this illustrates that there is an increase in potential. Generally, V_AE = 500 x 10-3 x 200 = 100 volt and V_AD = -50 + 100 = 50 volt. Likewise V_CB = 350 x 10^-3 x 100 = 35 volt.

• V1 voltage source is linked among A & B and this points out that the terminal B is lower potential than A that is, V_AB = V1 volt or V_BA = -V1 volt. One can write the voltage of point B with respect to D is V_BD = 50 – V1 volt.

• One can write KVL law about the closed-loop D-E-A-B-C-D as V_ED + V_AE + V_BA + V_CB + V_DC = 0 
-50 + 100 –V1 + 35 – 50 = 0

Hence, we have V_ED = -50 volt, V_AD = -50 + 100 = 50 volt, V_BD = 50 – 35 = 15 volt, V_CD = 15 + 35 = 50 volt.