Memory and Addressing:

A byte is the most utilized number in a microprocessor since each memory location or register is one byte wide. Memory need to be thought of as a sort of file cabinet with each location in it being a folder in the cabinet. In file cabinet, you go through the tabs on the folders until you resolute the right one. In order to get to each memory location, a different method is utilized. Instead, a unique address is assigned to each of location. In most of the microprocessors this address is a word or 16 bits, or 4 digit hex. This permits for a maximum of 65536 (216 or 64K) unique addresses or memory locations that can be accessed. Usually these addresses are referred to by a 4 digit hex number. Usually memory starts at address 0000h and could go up to FFFFh (216 or 64K or 65536 in total). In order to access these locations, a 16 bit address is presented to memory and the byte at that location is either read or written.

The Program Counter is what holds this address while the microprocessor is executing instructions. The reason instructions are sequentially read because the program counters automatically increments after fetching the current instruction. It does it even before the current instruction is acted. The sequence is that the program counter's contents are placed on the memory address bus and the instruction is fetched from memory through the data bus, and instantly the program counter is incremented by 1. Then the microprocessor looks at the instruction and begins processing it. If the instruction is not jump or call type of, the instruction is completed and the program counter is depicted to the memory address bus again and the next instruction is fetched, the program counter is incremented & the process begin over. This is referred to, in computer jargon, as fetch, decode, and execute. In the case of reading or writing data, the procedure is a little different. Data may be read from or written to memory in similar manner to the fetch. But data does not need the decode and execute steps.