DC Biasing-BJT:

Emitter-Stabilized Bias Circuit

 Base Emitter Loop

KVl Equation given for the loop is

                                                                                VCC-IBRB-VBE-IERE=0    
                                But                                          IE=(β+1)IB
                                Thus,
                                                                VCC-IBRB-VBE-(β+1)IBRE=0

                                                                -IB(RB+(β+1)RE)+VCC-VBE=0

                                                             IB=(VCC-VBE)/(RB+(β+1)RE)

Collector-Emitter Loop

                                                I_ER_E+V_CE+I_CR_C-V_CC=0

                                                                                But I_E=I_c

                                                      V_CE-V_cc+I_c(R_c+R_E)=0

                                                       V_ce=V_cc-I_c(R_c+R_E)

                Now VE is the voltage between the Emitter terminal and the ground, provided by

                                                                V_E=I_ER_E

                                Also Collector to ground voltage is

                                                                V_CE=V_C-V_E

                                                                V_C=V_CE+V_E

                                Also                        V_c=V_CC-I_cR_C

                                Voltage at the base w.r.t ground is

                                                                V_B=V_CC-I_BR_B

                                                                V_B=V_BE+V_E

Stabilization:

Because of addition of the emitter resistance the values of DC bias currents and voltages stays constant with any variation in the Temperature and transistor beta.