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For F = A.B.C + B.C.D‾ + A‾.B.C, write the truth table to realize the function using NAND gates only ?Ans. Logic Function given as F = ABC + BC‾D + A‾BC, simplification of this expession isgiven below:
(i)The Truth Table is specified in Table
Inputs
A B C D
Output
(F)
0 0 0 0
0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
(iii) The NAND-NAND Realization is represented in fig.(b)
We have multiple instances in RTL (Register Transfer Language), do you do anything special during synthesis stage? Whereas writing RTL(Register Transfer language),say in Verilo
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