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Write Policy
A write policy determines how the cache deals with a write cycle. The 2 common write policies areWrite-Throughand Write-Back. In Write-Back policy, the cache behave like a buffer. That is, when the processor begins a write cycle the cache receives the data and end the cycle. The cache then writes the data back to main memory when the system bus is available. This method provides the higher performance by let the processor to continue its job when main memory is updated at a later time. However, controlling writes of themain memory increase the cache's complexity and price. The second method is the Write-Through policy. The processor writes through the cache to main memory. The cache can update its contents, however the write cycle does not end till the data is stored into main memory. This method is less complicated and therefore less expensive to implement. The efficiency with a Write-Through policy is lower since the processor might wait for main memory to accept the data.
The modes are determined by the contents of the control register, whose format is given in Figure These modes are: Mode 0: If a group is in mode 0, it is divided into 2 sets.
Fourth Generation Microprocessor : The single chip 32-bit microprocessor was introduced in 1981 by Intel as iAPX 432. The other 4th generation microprocessors were; Hewlett
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