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Write Policy
A write policy determines how the cache deals with a write cycle. The 2 common write policies areWrite-Throughand Write-Back. In Write-Back policy, the cache behave like a buffer. That is, when the processor begins a write cycle the cache receives the data and end the cycle. The cache then writes the data back to main memory when the system bus is available. This method provides the higher performance by let the processor to continue its job when main memory is updated at a later time. However, controlling writes of themain memory increase the cache's complexity and price. The second method is the Write-Through policy. The processor writes through the cache to main memory. The cache can update its contents, however the write cycle does not end till the data is stored into main memory. This method is less complicated and therefore less expensive to implement. The efficiency with a Write-Through policy is lower since the processor might wait for main memory to accept the data.
IRET : Return from ISR:- When an interrupt service routine is called, before transferring control to it, the IP, CS register and flag registers are stored in the stack to ment
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Flag Manipulation and Processor Control Instructions These instructions control the functioning of available hardware inside the processor chip. These are categorized into thes
SBB: Subtract with Borrow :- The subtract with borrow instruction subtracts the source operand and the borrow flag (CF) which might reflect the result of the past calculations,
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INTO : Interrupt on Overflow:- It is executed, when the overflow flag OF is set. The new contents of IP and CS register are taken from the address 0000:0000 as described in INT
Assume that the registers are initialized to EAX=12345h,EBX =9528h ECX=1275h,EDX=3001h sub AH,AH sub DH,DH mov DL,AL mov CL,3 shl DX,CL shl AX,1 add DX,AX
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