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Write Hit Policies:
o Update next level on every write
o Cache is always clean
o A lots of traffic to next level (mostly write)
o Write to cache and mark block dirty
o Update primary memory to eviction
o Less traffic to next ,but more complicated eviction and coherence
o Reads use directly and data array at the same time
o Write use directory first then data array
o How to we pipeline to permit one read or write per cycle?
Shadow RAM is a copy of Basic Input/Output Operating System (BIOS) routines from read-only memory (ROM) into a particular area of random access memory (RAM) so that they can be acc
Q. Registers used in IA-64 architecture ? Registers: The IA-64 architecture comprises a very generous set of registers. It has an 82-bit floating point as well as 64-bit inte
Q. Explain about Dual In line Memory Modules? A DIMM is capable of delivering 64 data bits right away. Usual DIMM capacities are 64MB and up. Every DIMM has 84 gold patted conn
Explain about the Voice recognition system These voice recognition systems recognise spoken words e.g. for disabled people who can't use keyboards where they speak commands rat
Q. Illustrate about fourth generation computers? One of the main milestones in IC technology is Very large scale integration (VLSI) where thousands of transistors can be integr
Explain macro definition. A unit of specification for a program generation is termed as a macro. This consists of name, body of code and set of formal parameters.
what persistance shouold i use
Explain the working of a demultiplexer with the help of an example. Ans: 1:4 Demultiplexer: Fig.(a) demonstrates the logic circuit of a 1:4 demultiplexer. This has two NOT
How does TCP achieve reliability? One of the most significant technologies is retransmission. While TCP stands data the sender compensates for packet loss through implementing
What is WMFC
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