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Write Hit Policies:
o Update next level on every write
o Cache is always clean
o A lots of traffic to next level (mostly write)
o Write to cache and mark block dirty
o Update primary memory to eviction
o Less traffic to next ,but more complicated eviction and coherence
o Reads use directly and data array at the same time
o Write use directory first then data array
o How to we pipeline to permit one read or write per cycle?
Design a game application that plays the children's game of rock, paper, scissors. The user enters a letter indicating a choice. The Math.random method is then used to pick a value
Need to build a 4bit JK flip flop counter with a unique patter. 6 4 2 5 3 1 F C B A
State and prove Demorgan's second theorem Proof: Demorgan's second theorem = A‾ + B‾ The two sides of the equation here = A‾ + B‾ is represented through the logic d
Explain Lexical substitution during macro expansion ? Lexical substitution is used to produce an assembly statement from a model statement. Model statements have 3 kinds of str
Security features used in Client-Server types of network are as follows : i) Digital Signatures ii) Encryption / Decryption iii) Secure Socket Layer (SSL) iv) Firewa
Q. Example to show a single digit ? Displaying a single digit (0 to 9) Presume that a value 5 is stored in BL register then to output BL as ASCII value add character ‘0' to
external initiated operations
Q. Explain about DMA and Interrupt Breakpoints? DMA interface transfers complete block of data one word at a time directly to or from memory without going through processor. Wh
Explain the Low Level Language - Computer Programming? An assembly language or a machine language is known as Low-level language which are closer to the hardware than are high-
Q. Explain Micro-operations performed by CPU? The micro-operations performed by CPU can be categorized as: Micro-operations for data transfer from register-memory, re
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