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Why does DMA have priority over the CPU when both request a memory transfer?
The data transfer monitored by DMA controller which is called as DMA channel. The CPU is included only at the starting and end of the transfer, when the CPU wishes to read or write a block of data, it issues a command to DMA Channel by sending read/write operation, address of I/O, number of words to be read or written, as DMA have priority over the CPU when both request a memory transfer.
Define the component of a process precedence sequence? Ans. Process name, sequence operator and also concurrency operator components are process precedence sequence.
Flynn's Categorization Flynn's Categorization is based on multiplicity of data streams and instruction streams observed by CPU at the time of program execution. Let I s and D
Q. Show the Code Conversion with example? The conversion of data from one form to another is required. Consequently we will discuss an illustration for converting a hexadecimal
What is a client in SAP terminology? A S/W component that uses the service (offered by a s/w component) is known as a Client. At the similar time these clients may also be ser
What are primary keys and foreign keys? Primary keys are the unique identifiers for every row. They must have unique values and cannot be null. Due to their significance in rel
A part of an aircraft engine can be given a test before installation. The test has a 75% chance of revealing a defect if it is present, and the same chance of passing a sound part
What are the events used for page headers and footers? The events TOP-OF-PAGE and END-OF-PAGE are used for pager headers and footers.
Expain the working of associative memory
Q. Design Odd-Even Transposition Algorithm? Algorithm: Odd-Even Transposition for I=1 to N { If (I%2 != 0) //i.e. Odd phase {
Q. Decoding of slightly encoded micro-instructions? Generally micro-programmed control unit designs are neither totally unencoded nor highly encoded. They are slightly coded. T
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