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Divide overflow is generated when
(A) Sign of the dividend is dissimilar from that of divisor.
(B) Sign of the dividend is same as that of divisor.
(C) The first part of the dividend is smaller than the divisor.
(D) The first part of the dividend is greater than the divisor.
If the first part of the dividend is greater than the deviser, then the answer should be of greater length, then that can be hold in a register of the system. The registers are of fixed length in any processor.
Node at the highest level in the structure is known as?? Root.
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Distinguish between combinational logic circuits and sequential logic circuits. Ans: Combinational logic circuits:- (i) Outputs only depend upon present state of the i
algorithm of data structer
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