Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. What is Random Access Memory?
We will discuss RAM as an example of sequential circuit. A memory unit is a collection of storage cells or flip flops along with associated circuits needed to transfer information in and out of device. The access time and cycle time it takes are constant and independent of location therefore the name random access memory.
Figure: Binary Cell
RAMs are arranged (logically) as words of fixed length. Memory communicates with other devices by data input and output lines and address selection lines and control lines which specify direction of transfer.
Now let's try to understand how data is stored in memory. The internal construction of a RAM of 'm' words and 'n' bits per word comprises m ×n binary cells and connected circuits for detecting particular words. Figure below displays logic diagram and block diagram of a binary cell.
The input is fed to AND gate 'a' in complemented form. Read operation is denoted by 1 on read/write signal. Thus during read operation only 'AND' gate 'c' becomes active. If cell has been selected then output will become equivalent to state of flip flop it implies that data value stored in flip flop is read. In write operation 'a' & 'b' gates become active and they set or clear J-K flip flop relying upon input value. Please note in case input is 0 then flip flop will go to reflected in state of flip-flop. So we say that input data has been stored in flip-flop or binary cell.
Figure below is extension of this binary cell to an IC RAM circuit where a 2×4 decoder is used to select one of the four words. (For 4 words we require 2 address lines) Please note that every decoder output is connected to a 4 bit word and read/write signal is given to every binary cell. Once decoder selects word, read/write input tells operation. This is derived using an OR gate since all non-selected cells will generate a zero output. When memory select input to decoder is 0 none of words is selected and contents of cell are unchanged irrespective of read/write input.
Figure: 4 × 4 RAM
The data bus is Bi-directional because the similar bus is used for transfer of data among Micro Processor and memory or input / output devices in both the direction.
what is jsf
Phase - Thermodynamics: A phase is quantity of matter that is homogeneous throughout in chemical composition and physical structure. If the matter is all gas, all liquid or
Q. Explain Program Source Code? Program Source Code Every assembly language statement appears as: {identifier} Keyword {{parameter},} {;comment}. Element of a
What are the primary impacts of information systems on an organization (employer, club, school, religious, etc..) for which you are familiar? What are the primary ways in which
Question a) Name and explian the four essential elements of a machine instruction. b) Provide any four common examples of mnemonics. c) The level of disagreement conce
What is a table pool? A table pool (or pool) is used to join several logical tables in the ABAP/4 Dictionary. The definition of a pool having of at least two key fields and a
With the help of block diagram Elucidate basic time division time switching method. Basic Time Division Switching: Functional blocks of a memory based time division switching
The main features of TCP are: Reliability: TCP makes sure that any data sent by a sender arrives at destination as it was sent. There can't be any data loss or change in the
Synchronization Latency Problem: If two simultaneous processes are performing remote loading, then it is not recognized by what time two processes will load, as the issuing proces
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd