What is random access memory, Computer Engineering

Assignment Help:

Q. What is Random Access Memory?

We will discuss RAM as an example of sequential circuit. A memory unit is a collection of storage cells or flip flops along with associated circuits needed to transfer information in and out of device. The access time and cycle time it takes are constant and independent of location therefore the name random access memory.

172_What is Random Access Memory.png

Figure: Binary Cell

RAMs are arranged (logically) as words of fixed length. Memory communicates with other devices by data input and output lines and address selection lines and control lines which specify direction of transfer.

Now let's try to understand how data is stored in memory. The internal construction of a RAM of 'm' words and 'n' bits per word comprises m ×n binary cells and connected circuits for detecting particular words. Figure below displays logic diagram and block diagram of a binary cell.

The input is fed to AND gate 'a' in complemented form. Read operation is denoted by 1 on read/write signal. Thus during read operation only 'AND' gate 'c' becomes active. If cell has been selected then output will become equivalent to state of flip flop it implies that data value stored in flip flop is read. In write operation 'a' & 'b' gates become active and they set or clear J-K flip flop relying upon input value. Please note in case input is 0 then flip flop will go to reflected in state of flip-flop. So we say that input data has been stored in flip-flop or binary cell.

Figure below is extension of this binary cell to an IC RAM circuit where a 2×4 decoder is used to select one of the four words. (For 4 words we require 2 address lines) Please note that every decoder output is connected to a 4 bit word and read/write signal is given to every binary cell. Once decoder selects word, read/write input tells operation. This is derived using an OR gate since all non-selected cells will generate a zero output. When memory select input to decoder is 0 none of words is selected and contents of cell are unchanged irrespective of read/write input.

1320_What is Random Access Memory1.png

Figure: 4 × 4  RAM


Related Discussions:- What is random access memory

Use of overlapped register windows, Q. Use of Overlapped Register Windows? ...

Q. Use of Overlapped Register Windows? Register file comprises 138 registers. Let them be called by register number 0 - 137.  Diagram demonstrates the use of registers: when

The three main elements of ldb, The three main elements of LDB are:- St...

The three main elements of LDB are:- Structure Selections and Database Program.

How is secure sockets layer relied on the certificates, How is Secure Socke...

How is Secure Sockets Layer relied on the certificates? The Secure Sockets Layer standard is not a single protocol, but quite a set of accepted data transfer routines which a

Discuss about simple mail transfer protocol briefly, Discuss about Simple M...

Discuss about Simple Mail Transfer Protocol briefly. SMTP: It is sands for Simple Mail Transfer Protocol, is a protocol for sending e-mail messages among servers. Most e-

Define about hyper-threading technology, Q. Define about Hyper-threading te...

Q. Define about Hyper-threading technology? Hyper-threading technology enables a single microprocessor to behave as two separate threaded processors to operating system and app

Advantage of booth and restoring division algorithm, Describe the advantage...

Describe the advantage of using Booth algorithm? Ans:  a) It achieves efficiency in the number of additions needed when the multiplier has a few large blocks of 1's. b) It

Explain the process of skolemization., Problem 1. Explain briefly the p...

Problem 1. Explain briefly the process of matching production rules against working memory 2. What are the different kinds of knowledge that need to be represented in AI? Ex

Assignment, what is an interface and perpheral device

what is an interface and perpheral device

Pre-os and runtime sub-os functionality, In a raw Itanium, a "Processor Abs...

In a raw Itanium, a "Processor Abstraction Layer" (PAL) is integrated into the system. When it is booted the PAL is loaded into the CPU and gives a low-level interface that abstrac

Explain about cseg segment, CSEG SEGMENT  ASSUME CS:CSEG, DS:CSEG, SS:CS...

CSEG SEGMENT  ASSUME CS:CSEG, DS:CSEG, SS:CSEG  ORG 100h START:MOV AX, CSEG; Initialise data segment  MOV DS, AX; register using AX  MOV AL, NUM1; Take the first num

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd