What is race around condition, Computer Engineering

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What is race around condition?

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Race Around Condition:-

Jn

Kn

Q(n+1) output

 

0

1

0

1

 

0

0

1

1

 

Q(n)

1

0

Q(n)'

 

 

 

In JK flip-flop, while J=k=1 then output will be the complement of the earlier state. Assume the output Qn is 0 and clock pulse is high. After ?t that is the time interval, is equivalent to the propagation delay throughout two NAND gates the output will change to the Qn+1=1 (if there is J=K=1). There we have=K=1 and Q=1 and after the other ?t interval the output, Q will change to 0 from 1. Therefore after every ?t duration of the output will flip in between 0 and 1. At the ending of the clock pulse the value of Q is uncertain since the value of ?t is not identified exactly. Such situation is termed as race around situation.


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