Q. What is Dynamic Random Access Memory?

RAM technology is divided into 2 technologies: Static and dynamic. A dynamic RAM (DRAM) is made with cells which store data as charge on capacitors. Absence or presence of charge on capacitor is interpreted as binary 1 or 0. Since capacitors have a natural tendency to discharge, dynamic RAM needs periodic charge refreshing to maintain data storage. Term dynamic corresponds to this tendency of stored charge to leak away even with power continuously applied.

Figure below is a typical DRAM structure for an individual cell which stores one bit. The address line is activated when bit value from this cell is to be read or written.  Transistor acts as a switch which is closed (allowing current to flow) if a voltage is applied to address line and open (no current flows) if no voltage is present on address line.

For write operation a voltage signal is applied to bit line; a high voltage represents 1 and a low voltage represents 0.  A signal is then applied to address line allowing a charge to be transferred to capacitor. 

For read operation when address line is selected transistor turns on and charge stored on capacitor is fed out onto a bit line and to the sense amplifier. Sense amplifier compares capacitor voltage to a reference value and decides if cell contains logic 1 or logic 0.  The read out from cell discharges the capacitor that should be restored to complete operation. 

Even though the DRAM cell is used to store a single bit (0 or 1) it is necessary an analog device. Capacitor can store any charge value within a range. A threshold value determines whether charge is interpreted as 1 or 0.