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COMPUTER ORGANIZATION & ARCHITECTURE
1. What do you mean by digital computer? Explain the block diagram of a digital computer.
2. What do you mean by Difference Engine? Explain the structure of Babbage's Difference Engine.
3. What do you mean by Microprocessor? Define the CPU organization of 8085 microprocessor.
4. Define the term Bus. Explain the structure of Single Bus Organization and Two Bus Organization.
5. What do you mean by Addressing Mode? Classify different types of Addressing modes.
6. What is ALU? Explain the ALU operations.
7. Write down the Booth's Multiplication Algorithm. Justify the Booth's Multiplication Algorithm
8. Differentiate between Static Memories and Dynamic Memories.
9. What is mapping function? Classify different types of mapping functions.
10. Write short note on the following.
a) Programmed I/O b) DMA
1.Local queue -is a actual queue 2.Cluster queue -is a local queue that is called as throughout a cluster of queue managers 3. Remote queue -structure explaining a queue
Remember, the value of α is between 0 and 1. Now, let us put some values of α and compute the speed up factor for increasing values of number of processors. We get that the S(N) k
In8085 are of the following statements is not true.A) Co-processor is interfaced in max mode. B) Co-processor is interfaced in MIN mode C )Co-processor is interfaced in max/min mod
Drawback of these electromechanical and mechanical computers The basic drawback was: Inertia/friction of moving components had limited speed. The data movement usin
Q. Illustrate Domain Names and Address Resolution? But what if you don't know IP address of the computer you want to connect to? What happens if you need to access a web server
a. Sketch the excitation diagram indicating the last states and next states. b. Build the circuit using a Synchronous Counter with JK FF and NAND gates only. Replicate the circ
What are the different kinds of lock modes? There are three types of lock modes:- Shared lock Exclusive lock. Extended exclusive list.
I need help to create test cases for the MIPS Instruction set architecture
Q. Show the Connection between different networks? The connection between different stages is made in following manner: all outputs of 1 st crossbar switch of first stage a
Sequential Logic Gates SR flip flop 1)
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