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Q. What do you mean by Capacitance?
An ideal capacitor is an energy-storage circuit element (with no loss associated with it) representing the electric-field effect. The capacitance in farads (F) is defined by
C = q/v
where q is the charge on each conductor, and v is the potential difference between the two perfect conductors. With v being proportional to q, C is a constant determined by the geometric configuration of the two conductors. Figure (a) illustrates a two-conductor system carrying +q and -q charges, respectively, forming a capacitor.
The general circuit symbol for a capacitor is shown in Figure (b), where the current entering one terminal of the capacitor is equal to the rate of buildup of charge on the plate attached to that terminal,
i(t) = dq / dt = C dv / dt
in which C is assumed to be a constant and not a function of time (which it could be, if the separation distance between the plates changed with time).
Triac As the name suggests TRIAC is advice which has three electrodes and works on AC. The three terminals of triac are MTI ( Main Terminal ) MT2 ( Main terminal ) an
A voltage amplifier without feedback has a nominal gain of 500. The gain, however, varies in the range of 475 to 525 due to parameter variations. In order to reduce the per-unit ch
The devices in power system shown in Figure 2 have the following ratings: G1 : 100 MVA, 13.8 kV grounded Y, X” = 0.15 pu, X2 = 0.015 pu Xo = 0.05 pu G2 : 50 MVA, 20.0 kV grounded
State whether Lamis theorem is applicable for more than three coplanar concurrent forces?
Q. Show that the block diagram of Figure can be reduced to the form of Figure. Find G eq (s) and H eq (s).
A three-phase, 400-V, wye-connected induction motor takes the full-load current at 45 V with the rotor blocked. The full-load slip is 4%. Calculate the tappings k on a three-phase
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Q. When the J and K inputs of a JKFF are tied to logic 1, this device is known as a divide-by-2 counter. Complete the timing diagram shown in Figure for this counter.
LDAX Load Accumulator Indirect Instruction This instruction is used to copy data from memory location pointed by register pair only BC or DE to the accumulator HL pair
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