Unification - artificial intelligence, Computer Engineering

Assignment Help:

Unification - Artificial intelligence:

We have said that the laws of inference for propositional logic detailed in the previous lecture can also be used in first-order logic. However, we have to clear that a little. One important distinction between propositional and first-order logic is that the latter has predicates with expressions as arguments. So, one explanation we have to form is that we may use the inference lawsas long as the predicates and Arguments match up. That's why, not only do we have to check for the right kinds of sentence before we may carry out a law of inference, we also need to check that the arguments do not prohibit the inference.

For instance, let it in our knowledge base, we have the these two statements:

Knows (john) -> hates(john, X)

Knows(john, marry)

and we need to use the Modus Ponens law to infer something latest. In this case, there is no difficulty, and we may infer that, because john hates everybody  he knows, and he knows Mary, then he should hate Mary, i.e., we may infer that hates(john, mary) is right.

However, let it instead that we had these two sentences:

knows(john,X) -> hates(john, X)

knows(jack, mary)

Here, the predicate names have not altered, but the arguments are handling us back from forming any deductive inference. In the first case above, we might allow the variable X to be instantiated to marry during the assumption, and the constant john before and after the assumption also matched without error. However, in the second case, although we might still instantiate X to marry, we could no longer match john and jack, because they are two dissimilar constants. So we cannot deduce anything for john (or anyone else) from the latter two statements.

The problem here arises from our incapability to make the arguments in knows(john, X) and the arguments in knows(jack, marry) match up. When we may make two predicates match up, we say that we have combined them, and we will look at an algorithm for unifying two predicates (if they can be combined) in this section. Remember that unification acts a part in the way Prolog searches for matches to queries.


Related Discussions:- Unification - artificial intelligence

C++.., how to swap to nunbers

how to swap to nunbers

AWS, hosting on aws

hosting on aws

Explain an expression tree with a suitable example, What is an expression t...

What is an expression tree? How an expression is evaluated using an expression tree? Algebraic expressions is as given here a/b+(c-d)e That has an inherent tree-like structure

What is assembly condition codes, Condition codes are the list of possible ...

Condition codes are the list of possible conditions that can be tested through conditional instructions. Typical conditional instructions have: conditional branches, conditional ju

Explain one two motion selector per subscriber, What is 1 00 line exchang...

What is 1 00 line exchange with one two-motion selector per subscriber. Design: In, Strowger switching system is designed by using one two-motion selector for all subscrib

Illustration to demonstrate design of sequential circuits, Q. Illustration ...

Q. Illustration to demonstrate design of sequential circuits? Let us take an illustration to demonstrate above process. Suppose we want to design 2-bit binary counter employing

Traditional schema model, (a) Why did SAP introduce the extended star schem...

(a) Why did SAP introduce the extended star schema? Explain why it is reported to be better than the traditional schema model? (b) What is the difference between a dimension use

What is the purpose of guard bits, What is the purpose of guard bits used i...

What is the purpose of guard bits used in floating point operations? The guard bits are the extra bits which are used to retain the in-between steps to enhance the accuracy in

Define the pulse-triggered (master-slave) flip-flops, Define the Pulse-Trig...

Define the Pulse-Triggered (Master-Slave) Flip-flops? The term pulse-triggered signify that data are entered into the flip-flop on the rising edge of the clock pulse, though th

What is glitch and what are causes of it, What is glitch? What causes this ...

What is glitch? What causes this (describe with waveform)? How to overcome this? The gated clock‘s corresponding timing diagram demonstrates that it implementation can lead to

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd