Total harmonic distortion, Electrical Engineering

Assignment Help:

The site 450 kVA load is actually a three-phase, six pulse thyristor rectifier feeding a dc bus. Assuming that the voltage waveform at the site 11 kV bus is purely sinusoidal, calculate the Total Harmonic Distortion (THD) at the 415 V point of common coupling. Is this level of harmonic distortion acceptable?

The site engineer has decided that a 75 kVA three-phase power factor correction capacitor bank should be connected across the incoming ac supply to improve the sites' power factor and to support the local voltage level.

Calculate the Total Harmonic Distortion at the 415 V point of common coupling for this new circuit arrangement.

Is this new level of harmonic distortion acceptable? If not, give a brief view on how might you go about solving the problem?

1051_Total Harmonic Distortion.png


Related Discussions:- Total harmonic distortion

What do you mean by an assembler, What is an assembler? Assembler: An...

What is an assembler? Assembler: An assembler or macro-assembler usually forms a part of the operating system. This translates an assembly language program in machine languag

Find the residual output offset voltage, Q. In order to minimize output vol...

Q. In order to minimize output voltage offsets in practical op-amp circuits, one provides a dc path from each input terminal to ground, makes each input terminal see the same exter

Working of bootstrap sweep circuit, analysis and detail working of bootstra...

analysis and detail working of bootstrap sweep circuit

Telecommunication principles, Draw the block diagram of TDM-PCM system. Exp...

Draw the block diagram of TDM-PCM system. Explain each block. Calculate the bit rate at the output of this system

Multiplexers and flip flops, Decoders and multiplexers are termed, medium s...

Decoders and multiplexers are termed, medium scale integration (MSI) devices; this term implies that the device is complex in construction and usually its operation as well. Below

State kirchoff''s current law, State Kirchoff's Current Law Kirchoff's...

State Kirchoff's Current Law Kirchoff's Current Law (KCL) describes at any junction in an electric circuit the total current flowing towards that junction is equivalent to th

Ldst, Design a logic circuit with 4 inputs A, B, C & D that will produce o...

Design a logic circuit with 4 inputs A, B, C & D that will produce output ‘1’ only whenever two adjacent input variables are 1’s. A & D are also to be treated as adjacent, impleme

Explain different routing plan adopted in a network, Q. Explain different R...

Q. Explain different Routing plan adopted in a Telephone network.  Ans: Hierarchical networks are capable of handling heavy traffic where required, and at the same time us

Digital, #quesFind a minimum two level, multiple-output AND-OR gate circuit...

#quesFind a minimum two level, multiple-output AND-OR gate circuit to realize these functions (eight gates minimum). F1(a,b,c,d) =Sm(10,11,12,15) +D (4,8,14) F2(a,b,c,d) =Sm(4,11

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd