Total harmonic distortion, Electrical Engineering

Assignment Help:

The site 450 kVA load is actually a three-phase, six pulse thyristor rectifier feeding a dc bus. Assuming that the voltage waveform at the site 11 kV bus is purely sinusoidal, calculate the Total Harmonic Distortion (THD) at the 415 V point of common coupling. Is this level of harmonic distortion acceptable?

The site engineer has decided that a 75 kVA three-phase power factor correction capacitor bank should be connected across the incoming ac supply to improve the sites' power factor and to support the local voltage level.

Calculate the Total Harmonic Distortion at the 415 V point of common coupling for this new circuit arrangement.

Is this new level of harmonic distortion acceptable? If not, give a brief view on how might you go about solving the problem?

1051_Total Harmonic Distortion.png


Related Discussions:- Total harmonic distortion

Calculate the voltage across the capacitor, In the circuit above, V1 is a d...

In the circuit above, V1 is a dc supply which outputs 12V, R1 has a value of 100 Ω and C1 is 100µF. The switch has been left in the position shown for a long time such that there i

Determine primary to secondary turns ratio of transformer, Consider a sourc...

Consider a source of voltage v(t) = 10 √2 sin 2t V, with an internal resistance of 1800 Ω. A transformer that can be considered ideal is used to couple a 50- resistive load to th

Give the classification of oscillators, Q. Give the classification of oscil...

Q. Give the classification of oscillators. Discuss the frequency stability of oscillators. Oscillators are classified in the following different ways. 1. According to the wa

Use of speaker, Q. Use of Speaker? Speaker:Basically speaker is the rec...

Q. Use of Speaker? Speaker:Basically speaker is the receiver for telephone. Speaker converts electrical signals received from local loop to acoustical signals(sound waves) that

Configured the dual processor architecture, Configured dual processor archi...

Configured dual processor architecture  In centralized SPC, dual processor architecture can be configured to operate in following one of three modes: 1.  Standby mode: In

When mt2 is negative and g is positive , When MT 2 is Negative  and g is ...

When MT 2 is Negative  and g is positive In this  case  gate  current  flows  through  junctions P 2 N 2   electrons  are injected from  N 2   layer to  P 2   a result  junct

Safe conduct in electricity and gas hazards, Safe Conduct : what if a tr...

Safe Conduct : what if a trailing flex became caught up in an apparatus trolley and was cut? Or someone splashed water onto a plug, or concentrated sulphuric acid onto a flex? F

Express the differential equation, A network function is given by ...

A network function is given by (a) For x(t) = δ(t), obtain y(t). (b) For x(t) = u(t), obtain y(t). (c) For x(t) = e -4t , obtain y(t). (d) Express the differenti

Reduction of sequential monte carlo in medium voltage, how can optimized th...

how can optimized the system through the matlab software?

Illustrate hexadecimal number system, Q. Illustrate Hexadecimal Number Syst...

Q. Illustrate Hexadecimal Number System? A big difficulty with the binary system is verbosity. To symbolize the value 202 requires eight binary digits. The decimal version n

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd