Target - data phase, Computer Engineering

Assignment Help:

Target abort -computer architecture:

Usually, a target holds DEVSEL# asserted through the final data phase. However, if a target desserts DEVSEL# before disconnecting without data (asserting STOP#), it indicates a target abort, which is a fatal error condition. The initiator may not retry, and usually treats it as a bus error. Note that a target may not dessert DEVSEL# as waiting with TRDY# or STOP# low; it have to do this at the starting of a data phase. After observing STOP#, the initiator will terminate the transaction at the next legal chance, but if it has already signaled its wish to continue a burst (by asserting IRDY# without deserting FRAME#), it is not allowed to dessert FRAME# till the following data phase. A target that requests a burst end (asserting STOP#) can have to wait through another data phase (holding STOP# asserted without TRDY#) before the transaction can stop.

60_Target.png

Data transfer signals on the PCI bus.

550_Target1.png

Read operation on the PCI Bus

2425_Target2.png

Read operation showing the role of the TRDY #, IRDY #

 


Related Discussions:- Target - data phase

Html 4.0 element, , an HTML 4.0 element supported by Netscape6 and MSIE, de...

, an HTML 4.0 element supported by Netscape6 and MSIE, defines a set of text which is associated with a specific form element. For illustration, code belo

What is called network, Network with point-to-point link is known as (...

Network with point-to-point link is known as (A) Fully Connected Network        (B)  Half Connected Network (C)  Duplex Connected Network    (D)  None of these Ans:

Cn, What is the basic requirement for establishing VLANs?

What is the basic requirement for establishing VLANs?

What do you mean by prototype, Q. What do you mean by Prototype? A prot...

Q. What do you mean by Prototype? A prototyping approach lay emphasis on the construction model of a system. Designing and building a scaled-down though functional version of a

What is sisd, What is SISD?  Single Instruction stream, Single Data str...

What is SISD?  Single Instruction stream, Single Data stream (SISD) shows the organization of a single computer having a control unit, a processor unit, and a memory unit. Inst

Neural networks as perceptrons, Neural networks as perceptrons: Howeve...

Neural networks as perceptrons: However ANNs look like this in the general case:  Considered that the w, x, y and z represent real valued weights so all the edges in t

Presumably for heightened tension - first-order logic, Presumably for heigh...

Presumably for heightened tension - first-order logic: As an aside, it's worth pointing out that - presumably for heightened tension - in most Sherlock Holmes books, the m

Character and string processing instructions, Character and String Processi...

Character and String Processing Instructions: String manipulation usually is done in memory. Possible instructions comprise COMPARE STRING, COMPARE CHARACTER, MOVE STRING and MOVE

Real life decoding, We have not considered the time element in our decoding...

We have not considered the time element in our decoding. An important time for decoding is the time from the address strobe (AS) to when the data is required in a read.   Time

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd