Target - data phase, Computer Engineering

Assignment Help:

Target abort -computer architecture:

Usually, a target holds DEVSEL# asserted through the final data phase. However, if a target desserts DEVSEL# before disconnecting without data (asserting STOP#), it indicates a target abort, which is a fatal error condition. The initiator may not retry, and usually treats it as a bus error. Note that a target may not dessert DEVSEL# as waiting with TRDY# or STOP# low; it have to do this at the starting of a data phase. After observing STOP#, the initiator will terminate the transaction at the next legal chance, but if it has already signaled its wish to continue a burst (by asserting IRDY# without deserting FRAME#), it is not allowed to dessert FRAME# till the following data phase. A target that requests a burst end (asserting STOP#) can have to wait through another data phase (holding STOP# asserted without TRDY#) before the transaction can stop.

60_Target.png

Data transfer signals on the PCI bus.

550_Target1.png

Read operation on the PCI Bus

2425_Target2.png

Read operation showing the role of the TRDY #, IRDY #

 


Related Discussions:- Target - data phase

Opcode field of an instruction, For this machine there can be two more poss...

For this machine there can be two more possible addressing modes in addition to direct andimmediate.   Opcode field of an instruction is a group of bits which define various pro

What is called pcp, What is called PCP? The phenomenon of un-decidabili...

What is called PCP? The phenomenon of un-decidability is not confined to problems concerning automata. An un-decidable problem concerning on simple manipulation of strings is k

Explain programmer visible registers, Q. Explain Programmer Visible Registe...

Q. Explain Programmer Visible Registers? These registers can be accessed employing machine language. In general we encounter four kinds of programmer visible registers.

Determine the values of the output of the logic gates, Write the values of ...

Write the values of the C output for the following gates: For a(n) ________ gate, the output is zero if any of the inputs are equal to  one. For a(n) ________ gate ,the

Explain inheritance, Can you explain what inheritance is and an example of ...

Can you explain what inheritance is and an example of when you might use it? The process of deriving a new class from an existing class is known as Inheritance. The old class i

Positive logic nand gate is equivalent to negative logic nor, Show that a p...

Show that a positive logic NAND gate is equivalent to negative logic NOR gate. Ans:  Positive logic denotes True or 1 with a high voltage and False or 0 with a low volt

Hazards of pipeline - computer architecture, Hazards of pipeline - computer...

Hazards of pipeline - computer architecture: Hazards : When a programmer (or compiler) writes assembly program code, they make the supposition that each instruction is execut

Complex micro-controller, The 68Hc11 is actually a complex micro-controller...

The 68Hc11 is actually a complex micro-controller its contains internally RAM, EEPROM, Parallel IO and serial ports, hardware timers and a 8 channel ADC.  The internal structure is

Assembly Language, Write an assembly program to simulate a microwave

Write an assembly program to simulate a microwave

C, solution for oadovan string inc language

solution for oadovan string inc language

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd