Subtract two number by using 1's complement, Computer Engineering

Assignment Help:

Subtract the given number using 1's complement
11011 - 11001

Ans. 11011 - 11001 = X - Y
                            X =    11011
1's complement of Y =    00110
                       Sum = 1 00001
       End around carry =          1

Therefore X-Y = 00010

Related Discussions:- Subtract two number by using 1's complement

Define top-down parsing techniques, Define Top-down parsing Techniques ...

Define Top-down parsing Techniques Top-down parsing can be observed as an attempt to find left-most derivations of an input-stream through searching for parse trees using a top

Show programming based on data parallelism, Q. Show Programming Based on Da...

Q. Show Programming Based on Data Parallelism? In data parallel programming model the focal point is on data distribution. Every processor works with a part of data. We will co

Example to show directory in doc, Q. Example to show directory in doc? ...

Q. Example to show directory in doc? Like a file name, the directory name may also have up to eight alpha-numeric characters. The directory name can also have an extension

What is clr, What is CLR? CLR is .NET equivalent of Java Virtual Mach...

What is CLR? CLR is .NET equivalent of Java Virtual Machine (JVM). It is the runtime that changes a MSIL code into the host machine language code, which is then implemented a

What is mini frame size where propagation speed is 200 m µs, A CSMA/CD bus ...

A CSMA/CD bus spans a distance of 1.5 Km. If data is 5 Mbps, What is minimum frame size where propagation speed in LAN cable is 200 m µs. Usual propagation speed in LAN cables

Explain the use of functions in parallel programming, Q. Explain the Use of...

Q. Explain the Use of functions in parallel programming? include "pvm3.h" main() { int cc, tid, msgtag; char buf[100]; printf("%x\n", pvm_mytid());

How do we synthesize verilog into gates with synopsys, How do we synthesize...

How do we synthesize Verilog into gates with Synopsys? The answer can, of course, occupy various lifetimes to completely answer.. BUT.. a straight-forward Verilog module can b

Define logical data as operand data type, Q. Define Logical data as operand...

Q. Define Logical data as operand data type? Every word or byte is treated like a single unit of data. Whenever an n-bit data unit is considered as comprising n 1-bit items of

Deta sturcture, algorithm of travalling salesman problam

algorithm of travalling salesman problam

When one speech sample appears in time multiplexed system, In a time multip...

In a time multiplexed space switching system, one speech sample appears every? One speech sample shows every 125 micro sec, in a time multiplexed space switching system.

Write Your Message!

Name

Email id

Message

Verfication Code

User Account

All Pages