Sub-arithmetic instruction-microprocessor, Assembly Language

Assignment Help:

SUB: Subtract:- The subtract instruction subtracts the source operand from destination operand and result is left in the destination operand. Source operand might be memory location, register or immediate data  and the destination operand might be a or a memory location or register, but destination and source operands both might not be memory operands. Destination operand cannot be an immediate data. By this instruction, all the condition code flags are affected. The instance of this instruction along with the addressing modes is followed below:

Example :

1. SUB        0100H               Immediate [destination AX]

2. SUB        AX,    BX            Register

3. SUB        AX, [5000H]       Direct

4. SUB        [5000H], 0100    Immediate

 


Related Discussions:- Sub-arithmetic instruction-microprocessor

Interrupt priority management-microprocessor, Interrupt Priority Management...

Interrupt Priority Management The interrupt priority management logic indicated in given figure can be implemented in several ways. It does not required to be present in system

Pc bus and interrupt system-microprocessor, PC Bus and Interrupt System ...

PC Bus and Interrupt System The PC Bus utilized a bus controller, address latches, and data transceivers (bidirectional data buffers). 1) Bus controller : ( Intel 8288 Bus

Cmp-arithmetic instruction-microprocessor, CMP: Compare: - This instructio...

CMP: Compare: - This instruction compares the source operand, which can be a register or memory location an immediate data with a destination operand that might be a register or a

Pointer(ptr)-assemblers directive-microprocessor, PTR : Pointer:- The p...

PTR : Pointer:- The pointer operator which is used to declare the type of a variable, label or memory operand. The operator PTR is prefixed by either WORD or BYTE. If the prefi

Assignment, You have to write a subroutine (assembly language code using NA...

You have to write a subroutine (assembly language code using NASM) for the following equation.

Lds/les instruction execution-microprocessor, LDS/LES Instruction execution...

LDS/LES Instruction execution :  LAHF : Load AH from Lower Byte of Flag: - This instruction loads the AH register with the lower byte of the flag register. This instruction ca

External system bus architecture-microprocessor, External System Bus Archit...

External System Bus Architecture : This is a 16 bit processor with 40 pins. It has twenty address pins and out of which sixteen are utilized as data pins. This concept of by us

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd