State the term- use a define function, Computer Engineering

Assignment Help:

State the term- Use a define function

This is almost exactly the same approach as #define and -D compiler arg that C programs use. In your  Verilog  code,  use  a  'define  to  define  the  variable  condition  and  then  use  Verilog preprocessor directives such as 'ifdef. Use the '+define+' Verilog command line option. For an illustration:

... to run the simulation ..

verilog testbench.v cpu.v +define+USEWCSDF

... in your code ...

'ifdef USEWCSDF

initial $sdf_annotate (testbench.cpu, "cpuwc.sdf");

'endif

+define+ can also be filled in from your Makefile invocation, which in turn, can be finally filled in your UNIX prompt command line.

Defines are a blunt weapon since they are very global and you can only do so much with them asthey are a pre-processor trick. Consider the subsequent approach before resorting to defines.

 


Related Discussions:- State the term- use a define function

Explain parsing techniques, Explain any three parsing techniques. Follo...

Explain any three parsing techniques. Following are three parsing techniques: Top-down parsing: This parsing can be viewed as an attempt to get left-most derivations of an

Subscript and an index in a table definition, What is the difference betwee...

What is the difference between a subscript and an index in a table definition? Ans) A subscript is a working storage data definition item, typically a PIC (999) where a value mu

Rule in a single direction - equivalences rules, Rule in a single direction...

Rule in a single direction - equivalences rules: Hence there the power to replace  sub expressions always allows use to prove theorems with equivalences: as given in the above

What are drawbacks of electronic data interchange processes, What are the d...

What are the drawbacks of Electronic Data Interchange processes? Disadvantages of EDI processes are given below: 1. The X12 standard is so huge and general 2. Electron

Describe about analysis, Analysis describes about the logical and statistic...

Analysis describes about the logical and statistical analysis needed for an efficient output. This involves writing of code and performing calculations, but most part of these lang

What are the different sections of a report, What are the different section...

What are the different sections of a report? A report is categorized into many sections: The Report header: In this you place a control which must appear only at the startin

Explain the properties of hypercube, Q. Explain the properties of Hypercube...

Q. Explain the properties of Hypercube? Properties of Hypercube: Hypercube is both edge and node symmetric. The labels of any two neighbouring nodes vary in exactl

Computer systems principles, Your program should print the inverted map to ...

Your program should print the inverted map to the screen (using a format similar to the inverter project, but you will print out the url values instead of document IDs). You can pr

What is check box, A dialog box, generally square, that records an on or of...

A dialog box, generally square, that records an on or off value.

Explain naming convention libraries, Explanation:- Common used functions...

Explanation:- Common used functions are placed in libraries. These are located in the SQABas32 subdirectory of the Robot working directory. A library is separated into three fil

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd