State the term- use a define function, Computer Engineering

Assignment Help:

State the term- Use a define function

This is almost exactly the same approach as #define and -D compiler arg that C programs use. In your  Verilog  code,  use  a  'define  to  define  the  variable  condition  and  then  use  Verilog preprocessor directives such as 'ifdef. Use the '+define+' Verilog command line option. For an illustration:

... to run the simulation ..

verilog testbench.v cpu.v +define+USEWCSDF

... in your code ...

'ifdef USEWCSDF

initial $sdf_annotate (testbench.cpu, "cpuwc.sdf");

'endif

+define+ can also be filled in from your Makefile invocation, which in turn, can be finally filled in your UNIX prompt command line.

Defines are a blunt weapon since they are very global and you can only do so much with them asthey are a pre-processor trick. Consider the subsequent approach before resorting to defines.

 


Related Discussions:- State the term- use a define function

Interconnection network in-array processing, Interconnection Network (IN): ...

Interconnection Network (IN):  IN performs data exchange between the PEs, manipulation functions and data routing. This IN is under the control of CU.

Write policy of cache memory, Q. Write Policy of cache memory? If conte...

Q. Write Policy of cache memory? If contents of a block in cache are changed then it's essential to write it back to main memory before replacing it. Write policy determines wh

What is artificial intelligence fuzzy logic, Fuzzy logic is a form of vario...

Fuzzy logic is a form of various-valued logic; it deals with reasoning that is approximate rather than fixed & exact. In contrast with traditional logic theory, where binary sets h

Build and fix model, Why Build and fix model is considered as ad-hoc softwa...

Why Build and fix model is considered as ad-hoc software development model?

What is verilog, What is Verilog Verilog  language  is  still  rooted  ...

What is Verilog Verilog  language  is  still  rooted  in  it's  native  interpretative  mode.  Compilation  is  a means of speeding up simulation however has not changed the or

How semaphores implement mutual exclusion, How semaphores implement mutual ...

How semaphores implement mutual exclusion? Mutual-exclusion implementation along with semaphores: Assume that there are n-processes and they share a semaphore, mutex (stan

Operating systems Hw, Need help in class assignment !! i have only 24 hours...

Need help in class assignment !! i have only 24 hours!!

Call the user methods by creating the object, Make a class library and desc...

Make a class library and describe class 'User'. In User class describe the public, protected and Friend functions. Make a console application andadd a reference to this library and

Minimum power dissipation of digital logic family, Which digital logic fami...

Which digital logic family has minimum power dissipation ? Ans. The minimum power dissipation of digital logic family is CMOS. CMOS being an unipolar logic family, occupy a to

What are single stage and multistage networks, What are single stage and mu...

What are single stage and multistage networks? Compare the strengths and weaknesses of each. OR List the major difference in single stage, two stages and three stage Netw

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd