State the term- use a define function, Computer Engineering

Assignment Help:

State the term- Use a define function

This is almost exactly the same approach as #define and -D compiler arg that C programs use. In your  Verilog  code,  use  a  'define  to  define  the  variable  condition  and  then  use  Verilog preprocessor directives such as 'ifdef. Use the '+define+' Verilog command line option. For an illustration:

... to run the simulation ..

verilog testbench.v cpu.v +define+USEWCSDF

... in your code ...

'ifdef USEWCSDF

initial $sdf_annotate (testbench.cpu, "cpuwc.sdf");

'endif

+define+ can also be filled in from your Makefile invocation, which in turn, can be finally filled in your UNIX prompt command line.

Defines are a blunt weapon since they are very global and you can only do so much with them asthey are a pre-processor trick. Consider the subsequent approach before resorting to defines.

 


Related Discussions:- State the term- use a define function

Bi polar junction transistor, draw input and output charectoristics of BJT ...

draw input and output charectoristics of BJT and justify CE configuration provides large current amplification

What is locality of reference, What is locality of reference? Analysis ...

What is locality of reference? Analysis of program represents that many instructions ion localized areas of the program are implemented repeatedly during some time period, and

What is class and class diagram, What is class, class diagram? An objec...

What is class, class diagram? An object is an instance of a class. Class explains a group of objects with similar properties (attributes), behaviour (operations), kinds of rela

Multi-layer artificial neural networks, Multi-Layer Artificial Neural Netwo...

Multi-Layer Artificial Neural Networks - Artificial intelligence: Now we can look at more sophisticated ANNs, which are known multi-layer artificial neural networks because the

What are the features of the hardwired control, What are the features of th...

What are the features of the hardwired control? A controller that uses this approach can function at high speed. It has little flexibility and the complexity of the instruction

What is automated information system, What is automated information system ...

What is automated information system Using this automated information system affords below benefits to the company and customers: -  System can be linked into websites to g

Explain HLL program & execution of machine language program, Give the Schem...

Give the Schematic of Interpretation of HLL program and execution of a machine language program by the CPU. The CPU utilizes a program counter (PC) to notice the address of nex

Define the types programmable logic devices?, Define the types Programmable...

Define the types Programmable logic devices? There are mostly three types PLDs. These are vary in the placement of fuses in the AND- OR array. 1. ROM- It has fixed AND array

Evaluation function - canonical genetic algorithm, Evaluation function - ca...

Evaluation function - canonical genetic algorithm: However note that this termination check may be related or the same as the evaluation function - that discussed later - but

How to develop an object model, How to develop an object model To deve...

How to develop an object model To develop an object model firstly identify classes and their associations, as they affect overall problem structure and approach. Then prepare

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd