Stack operation and interrupts in microprocessor, Computer Engineering

Assignment Help:

Let us review the operation of the stack within the 68HC11, the stack is a defined area of RAM which is last in first out register (LIFO) . Access to the stack is made via a stack pointer (SP). In the 68HC11 there is only one stack pointer and it is initialised by the LDS command. To transfer data onto the stack we can use the command PSHA or PSHB i.e. push register A or B onto the stack. To remove data simply pull it i.e PULA or PULB, likewise the index registers may be stacked  etc.

      PSHA Push A onto Stack
      PSHB  Push B onto Stack
      PSHX  Push X onto Stack
      PSHY  Push Y onto Stack
      PULA Pull A onto Stack
      PULB  Pull B onto Stack
      PULX  Pull X onto Stack
      PULY  Pull Y onto Stack

Every time data is 'Pushed' onto the stack the Stack pointer is decrements accordingly. The stack is used often by the micro controller for temporary holding data, if a subroutine occurs, the processor stacks the return address and upon the receipt of the RTS command, it pulls the return address automatically. During an interrupt the processor stacks the full details of itself i.e.

  SP    Condition code  
  SP-1    Accumulator A
  SP-2    Accumulator B
  SP-3    Index register X high
  SP-4    Index register X low
  SP-5    Index register Y high
  SP-6    Index register Y low
  SP-7    return address High
  SP-8    Return address Low 
  SP-9    Stack pointer after interrupt

Therefore great care should be taken when using the stack as during an interrupt or subroutine if you place data on the stack you must remove the data before you return from it.


Related Discussions:- Stack operation and interrupts in microprocessor

Effective branching rate - heuristic searches, Effective Branching Rate: ...

Effective Branching Rate: Assessing heuristic functions is an important part of "AI" research: a particular heuristic function may sound such a good idea, but in practice give

Nor gate, The NOR gate. The NOR gate is equivalent to an OR gate follow...

The NOR gate. The NOR gate is equivalent to an OR gate followed by a NOT gate so that the output is at logic level 0 when any of the inputs are high otherwise it is at logic le

Instruction cycle-flynn’s classification, Instruction Cycle The instruc...

Instruction Cycle The instruction cycle consists of a series of steps needed for the implementation of an instruction in a program. A typical instruction in a program is descri

What is known as multiphase clocking, What is known as multiphase clocking?...

What is known as multiphase clocking? When edge-triggered flip flops are not used, two or more clock signals may be required to guarantee proper transfer of data. This is calle

Explain bitwise-and operator, Bitwise-AND Operator: & AND-expression : ...

Bitwise-AND Operator: & AND-expression : relational-expression AND-expression & equality-expression The bitwise-AND operator (&) compares each bit of its first operand t

Write an interrupt routine to handle division by zero, Q. Write an interrup...

Q. Write an interrupt routine to handle 'division by zero'? This file can be loaded just like a COM file though makes itself permanently resident until the system is running.

What is the difference among thread and process, Thread is a least unit of ...

Thread is a least unit of process. In process have one or more thread.

Array processing, Array Processing We have seen that for performing vec...

Array Processing We have seen that for performing vector operations, the pipelining concept has been taken. There is another method for vector operations. If we have an array o

Data bus is bidirectional, Why address bus is unidirectional and data bus i...

Why address bus is unidirectional and data bus is bidirectional? Ans) Because there is no require address transaction among processor and peripheral device but data bus is req

Describe the working of components of i-way infrastructure, Describe the wo...

Describe the working of components of I-way Infrastructure. Working of I-way Infrastructure components: a. Consumer access equipment shows a critical category, it is the abs

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd