Software overheads in parallel programming , Computer Networking

Assignment Help:

Besides these hardware overheads, there are certain software overheads imposed by libraries, parallel compilers, tools and operating systems.

The parallel programming languages are developed for parallel computer environments. These are developed either by introducing new languages (e.g. occam) or by modifying existing languages like, (C and FORTRAN).  Normally the language extension approach is preferred by most computer designs. This decreases compatibility problem.  High-level parallel constructs were added to C and FORTRAN to make these languages suitable for parallel computers. Besides these, optimizing compilers are designed to automatically detect the parallelism in program code and change the code to parallel code.

In addition to development of compilers and languages for parallel programming, a parallel programming environment should also have supporting tools for text editing and development of parallel programmes.

Let us now talk about the examples of parallel programming environments of Cray Y-MP software and Intel paragaon XP/S.

The Cray Y-MP system works with UNICOS operating system.  It has two FORTRAN compilers CFT and CFT 77 for automatic vector code generation. The system software has large library of routines, program management utilities, assembler UNICOS and debugging aids written in C. It supports optimizing, vectorizing, concurrentising facilities for FORTRAN compilers and also has vetorizing and optimizing C compiler. The Cray Y-MP has three multitasking / multiprocessing methods namely, (i) microtasking (ii) macrotasking, , (iii) autotasking. As well, it has a subroutine library, containing a variety of utilities, high performance subroutines along with scientific routines and math.

The Intel Paragaon XP/S system is an extension of Delta systems and Intel iPSC/860, and is a mesh and scalable connected multicompiler which is executed in a distributed memory system.

The processors that for nodes of the system are 50 MHz i860 XP Processors. Furthermore, it uses distributed UNIX based OS technology. The languages supported by Paragaon have C, C++, ADA and Data Parallel Fortran. The tools for integration contain FORGE and Cast parallelisation tools. The programming environment contains an Interactive Parallel Debugger (IPD).


Related Discussions:- Software overheads in parallel programming

Routing table - network layer and routing , Routing Table A routing  t...

Routing Table A routing  table has columns  for at  three types o information  the network  ID  the cost  and the  ID of the  next  router. The  network  ID is the final  desti

What is transmission media, Q. What is Transmission Media? - Actually s...

Q. What is Transmission Media? - Actually situated below the physical layer - Directly controlled through the physical layer - Data should be converted into electromagnet

Tech ed, can you help me convert binary into decimals?

can you help me convert binary into decimals?

Bit stuffing, bit stuffing program in python

bit stuffing program in python

Distinguish among client process and server process, QUESTION (a) Expla...

QUESTION (a) Explain briefly what is meant Client-server Computing? (b) Distinguish among client process and server process (c) What are the four basic characteristics of

What is protocol data unit, What is Protocol Data Unit? The data unit i...

What is Protocol Data Unit? The data unit in the LLC level is known as the protocol data unit (PDU). The PDU having of four fields a destination service access point (DSAP), a

Division of the address space, The IP class procedure does not split the 32...

The IP class procedure does not split the 32-bit address space into same size class and the classes do not have the same value of networks. A prefix of n bits gives 2n unique ne

Determine the maximum output current, A logic gate drives a load, which has...

A logic gate drives a load, which has a resistance of 1 kÙ and a capacitance of 20 pF. The printed circuit track connecting the gate to its load has an 40 pF capacitance to ground.

Explain tree interconnection network, Tree interconnection network:   In tr...

Tree interconnection network:   In tree interconnection network, processors are organised in a complete binary tree pattern. Figure: Tree interconnection network

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd