Software architecture of microprocessor, Computer Engineering

Assignment Help:

The 68HC11 series is based on the Motorola 6800/1 programming instruction set and hence is a fairly simple 8 bit microprocessor. The internal structure of the 6800/1 is shown below

The 6800/1 contains two 8 bit accumulators namely A,B which are used to process/hold data for the Arithmetic/Logic calculations . These can be combined to form one single 16 bit accumulator namely D. Also included are two 16 bits index register IX, IY which are mainly used for  pointing too addresses , but can also be used as a 16 bit store or counter. The next two 16 bits registers are the Program counter (PC) used for holding the current address of the program and the stack pointer (SP) used for holding the address of the next available stack (RAM) position .The final register is a 8 bit register called the condition code register (CCR) , this is used to hold the results of the last ALU operation , each bit (flag) is a particular ALU condition  as shown below

2029_Software Architecture of microprocessor.png

C- Carry/Borrow flag if set indicates that an arithmetic carry/borrow has occurred

V overflow if set indicates that the answer was greater that 8 bits  

Z zero flag if set if the ALU answer has produced a zero  

N - Negative if set this indicates that a negative number has been generated i.e. bit 7 = 1  

I - Interrupt mask if set stops further masked interrupts from happening

H Half carry, if set indicates that a half carry has occurred i.e. ALU result has caused a carry to occur between bit 3,4

X - Interrupt mask, if set indicates that a non masked interrupt has occurred i.e. Reset or XIRQ. Cleared by TAP or RTI

S Stop disable if set disables the use of the stop instruction, if cleared enables the stop command

The 68HC11 instruction set consists of three major groups:
 
          Maths Functions 
          Movement functions
          Processor commands
 
Before we tackle each section we shall first discuss the various addressing modes of each instruction


Related Discussions:- Software architecture of microprocessor

Forward chaining - artificial intelligence, Forward Chaining - Artificial i...

Forward Chaining - Artificial intelligence: Imagine we have a set of axioms which we know are true statements regarding the world. If we set these to each be a starting state o

Enumerate the history of computers, Enumerate the History of computers ...

Enumerate the History of computers Basic information about technological development trends in computer in past and its projections in future. If you want to know about compute

Illustrate high performance fortran, In 1993 High Performance FORTRAN Forum...

In 1993 High Performance FORTRAN Forum which is a group of academicians and many leading software and hardware vendors in field of parallel processing established an informal langu

Instruction set architecture - assembly language, Instruction Set Architect...

Instruction Set Architecture (ISA): The Instruction Set Architecture (ISA) is the part of the processor which is noticeable to the compiler writer or programmer. The ISA serve

One pointer variable be subtracted from another, Under what conditions can ...

Under what conditions can one pointer variable be subtracted from another? Pointer subtraction isn't used very much, but can be handy to determine the distances between two arr

Where can i find conference information, Georg Thimm handles a webpage that...

Georg Thimm handles a webpage that lets you search for upcoming or past conferences in a range of AI disciplines.

#project, how to build PVR set-top box using raspberry

how to build PVR set-top box using raspberry

Advantages and disadvantages of shared memory programming, Q. Show Advantag...

Q. Show Advantages and Disadvantages of Shared Memory Programming? Advantages of Shared Memory Programming Data sharing between processes is both rapid and uniform bec

A sorting algorithm is stable, A sorting algorithm is stable if  Preser...

A sorting algorithm is stable if  Preserves the original order of records with equivalent keys.

What is race condition, What is Race condition? Race condition: The c...

What is Race condition? Race condition: The circumstances where several processes access - and manipulate shared data-concurrently. The last value of the shared data depends

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd