Slower layer to a faster layer, Computer Engineering

Assignment Help:

Given a four level hierarchical storage system consisting of: cache,  primary storage, secondary storage, and tertiary storage. Suppose the following:  programs may be executed on any of the four levels; each level consists of the same amount of real storage and the range of addresses on each level is identical. The speed at which programs are run is grouped from slowest (tertiary storage) to fastest (cache), where each layer is 10 times faster than the previous lower layer. There exists one CPU in this system, which may run one program at a time. Programs may be shuttled from any layer to any layer.

a) Why might the operating system choose to move information from a faster level to a slower level, bypassing an intermediate level, IE. from cache to secondary  storage?

b) Why would items move from a slower layer to a faster layer?

c) Should information be allowed to move from any level to any level or should transfers only occur from adjacent levels? Explain in detail.


Related Discussions:- Slower layer to a faster layer

Write a verilog code to swap contents of two registers, Write  a  verilog  ...

Write  a  verilog  code  to  swap  contents  of  two registers  with  and without  a  temporary register? With temp reg : always @ (posedge clock) begin temp=b; b

What is meant by latch, Latch is a D- type flip-flop used as a temporary st...

Latch is a D- type flip-flop used as a temporary storage device controlled by a timing signal, which can kept 0 or 1. The primary function of a Latch is data storage. It is used in

Mobile cameras, Mobile cameras are characteristically low-resolution Digita...

Mobile cameras are characteristically low-resolution Digital cameras integrated in mobile set. Photographs are characteristically only good enough to show on low resolution mobile

Explain the process of inter-register signalling, Explain the process of in...

Explain the process of inter-register signalling. Registers are utilized in common control exchanges to store and analyze routing data. They are given on a common basis is a

Design issues related to interrupt-driven input - output, Q. Design issues ...

Q. Design issues related to interrupt-driven Input - output? So interrupt handling includes interruption of currently executing program, execution of interrupt servicing progra

Design a nand-to-and gate network, Q Use as few gates as possible, design a...

Q Use as few gates as possible, design a NAND-to-AND gate network that realize the following Boolean algebra expression. ABCD + A'BC'D + A'BC'D' + A'BCD + (A'B'C'D' + A'BCD')

What is dot pitch of a CRT, Q. What is Dot Pitch of a CRT? Dot Pitch of...

Q. What is Dot Pitch of a CRT? Dot Pitch of a CRT is the distance between phosphor dots of same colour. In Trinitron screens, the term Slot Pitch is used in place of Dot Pitch

What are handshaking signals, a. Explain the hardware mechanism for handlin...

a. Explain the hardware mechanism for handling multiple interrupt requests. b. What are handshaking signals? Describe the handshake control of data transfer during input and out

Advantage of doubly linked list over singly linked list, What is the advant...

What is the advantage of doubly linked list over singly linked list?       Ans: Benefits of the doubly linked list over singly linked list 1. A doubly linked list can be pas

Ai6301 - building blocks and techniques used in ai, The princess (or princ...

The princess (or prince if you're female) has been captured by the Evil Dragon and held prisoner in a tower. The tower is also surrounded by a maze to keep out the riff-raff. You

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd