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Singles Phase Half wave Controlled Rectifier with RL Load
When gate pulses are applied to the thyristor at output voltage v0 follows the input voltage vs( = Vm sin ) since the load is RL and due to presence of inductance the output current of load current i0 will not be in phase with v0. Inductance opposes the instantaneous change in current and due to this property the load current cannot be increased or decreased in scantly with voltage. This fact is easily understood by the concept that inductance first stores the energy and after some time it releases the stored energy. Therefore at when output voltage is reversed thyristor is kept conductivity because at this time load current flows continuously. After stored energy is dissipated in the load current becomes zero. The reception will start at when again gating pulse is applied to the thyristor.
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why conductance is not zero at end pont? reply as soon as possible.
block diagram of digital control system and explain each block
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