Signaling - universal serial bus , Computer Engineering

Assignment Help:

Signaling - Universal Serial Bus:

USB supports following signaling rates:

o   A low speed rate of 1.5 Mbit/s is defined by USB 1.0. This is so much similar to "full speed" operation except each bit takes 8 times as long to transmit. It is intended primarily to save price in low-bandwidth human interface components (HID) such as mice, keyboards and joysticks.

o   A hi-speed (USB 2.0) rate of 480 M bit/s was introduced in the year2001. All hi-speed components are capable of falling  back  to  full-speed  operation  if  needed;  they  are  backward  compatible.  Connectors are identical.

o   The full speed rate of 12 Mbit/s is the fundamental USB data rate which is defined by USB 1.1. All USB hubs hold up full speed.

o   A Super Speed (USB 3.0) rate of 5.0 Gbit/s. The USB 3.0 requirement was released by Intel and partners in the year 2008, according to early reports from CNET news. The first USB 3 controller chips were sampled by NEC May  in the year 2009  [11] and generate by using the 3.0 specification are expected to arrive beginning in Q3 2009 and 2010.[12]  USB 3.0 connectors are usually backwards compatible, but include new wiring and full duplex operation. There is little incompatibility with older connectors.

USB signals are transmitted on a braided pair data cable having 90Ω ±15% Characteristic impedance,[13] labeled D- and D+ Prior to USB 3.0, These all collectively use in half-duplex differential signaling to reduce the effects of electromagnetic noise on longer lines. Transmitted signal levels are in the range 0.0-0.3 volts for low and in the range 2.8-3.6 volts for high in full speed (FS) and low speed (LS) modes, and -10-10 mV for low and 360-440 mV for high in hi- speed (HS) mode. In Full Speed mode the cable wires are not terminated, but in the HS mode has termination of 45 Ω to ground, or 90 Ω differentials to match the data cable impedance, by reducing interference of specific kinds. USB3.0 introduces 2 extra pairs of shielded twisted wire and new, mostly interoperable contacts in USB3.0 cables, for them. They allow the higher data rate, and also full duplex operation.

A USB connection  is  always  among a  host  or  hub at  the "A" connector  end,  and  a component  or  hub's "upstream" port at the other end. Initially, it was a "B' connector, saving from erroneous loop connections, but extra added upstream connectors were precise, and some cable vendors designed and sold cables which allowed erroneous connections (and potential damage to the circuitry). USB interconnections are not as perfect or as effortless as originally intended.

The host includes 15 kΩ pull-down resistors on each data line. While no device is connected, this pulls both data lines low into the so-called "single-ended zero" state (SE0 in the USB documentation), and mention a disconnected or reset connection.

A USB device pulls 1 of the data lines high having a 1.5 kΩ resistor. it overpowers 1 of the pull-down resistors in the host and leaves the data lines in an idle state which is called "J". For USB 1.x, the option of data line indicates a device's speed support; full-speed components pull D+ high, while low-speed devices pull D- high.

USB data is transmitted by toggling the data lines between the opposite K state and the J state. USB encodes data by using the NRZI convention; a 0 bit is transmitted by toggling the data lines from J to K or vice-versa, when a 1 bit is transmitted by leaving the data lines as-is. To ensure a minimum density of signal transitions USB uses bit stuffing technique; an extra 0 bit is inserted into the data stream after any appearance of 6 consecutive 1 bits. 7 consecutive 1 bits is all the time an error. USB 3.00 has included extra added data transmission encodings.

A USB packet starts with an 8-bit synchronization sequence 00000001. That is data lines toggle KJKJKJKK, after the initial idle state J. The final 1 bit (repeated K state) marks the end of the sync pattern and the starting of the USB frame.

A USB packet's end which is called EOP (end-of-packet), is specified by the transmitter driving 2 bit times of SE0 (D+ and D- both below max) and 1 bit time of J state. After this, the transmitter ceases to drive the D-/D+ lines and the aforementioned pull up resistors hold it in the J (idle) state. Sometimes skew due to reason of hubs may add as much as one bit time before the SE0 of the end of packet. This extra bit can be result in a "bit stuff violation" if the 6 bits before it in the CRC are '1's. This bit should be avoided by receiver.

A USB bus can reset by using a prolonged (10 to 20 milliseconds) SE0 signal.


Related Discussions:- Signaling - universal serial bus

Example of prolog, Example of Prolog: We can say that this is also tru...

Example of Prolog: We can say that this is also true if there are four even numbers. Now we have our first rule: • If there are three or four even numbered cards, such play

Static and dynamic hazard, what inputcombinations may those hazard take pla...

what inputcombinations may those hazard take place and how can they be eliminated? F1= AB'' + A''C + BC''D'' F2= AB + A''C''D + AB''D

Dynamic programming problem, KK manufacturing company is faced with demand ...

KK manufacturing company is faced with demand for its product in each of the next four periods as shown in Table 1.  It must decide upon a production schedule to meet these demands

Embedded, explain djnz instruction of intel 8051 microcontroler

explain djnz instruction of intel 8051 microcontroler

Gantt chart and kiviat diagram, Q. What is Gantt chart and Kiviat diagram? ...

Q. What is Gantt chart and Kiviat diagram? Gantt chart: Gantt chart explains numerous activities of every processor with respect to progress in time in busy -overhead - id

Difference between latches and flip-flops based designs, What is the differ...

What is the difference between latches and flip-flops based designs Latches are level sensitive whether flip-flops are edge sensitive. So, latch based design and flop based des

What is java awt, An AWT stands for Abstract Window Toolkit. AWT handles pr...

An AWT stands for Abstract Window Toolkit. AWT handles programmers to develop Java applications with GUI components, like windows, and buttons. The Java Virtual Machine (JVM) is re

Give brief explanation about the keyboards, Give brief explanation about th...

Give brief explanation about the keyboards Keyboards are generally not offered as the number of options is limited and owners of the system do not want customers keying in info

Bilinear interpolated images , Transfer  Functions Change the last bili...

Transfer  Functions Change the last bilinear interpolated images and the original images into the frequency domain using the FFT.  Try to measure the magnitude transfer functio

Name the widely used language processor development tool, Name the widely u...

Name the widely used Language Processor Development Tools ( LPDTs). Widely used Language processor development tools are: Lex - A Lexical Analyzer Generator Lex assi

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd