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Q. Sequential Execution of Instructions in RISC?
Let's describe pipelining in RISC with an illustration program execution sample. Take the given program (R denotes register).
LOAD RA (Load from memory location A)
LOAD RB (Load from memory location B)
ADD RC ,RA , RB (RC = RA + RB) )
SUB RD , RA , RB (RD = RA - RB)
MUL RE , RC , RD (RE = RC × RD)
STOR RE (Store in memory location C)
Return to main.
Sequential Execution of Instructions
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Yes, it can be used, if an accurate clock frequency is not needed. Also, the component cost is low contrast to LC or Crystal.
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