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Difference among the Static rams and dynamic rams. Static RAM: It is costly as each bit of memory will take around 6 CMOS transistors. More speedy as transistors are us
How many select lines will a 16 to 1 multiplexer will have ? Ans. For 16 to 1 MUX four select lines will be needed to select 16 (2 4 ) inputs.
Cache Misses Compulsory misses - it is caused by initial access to a block that has never been in the cache (also called cold start misses Capacity miss - it is cause
How many AND gates are required to realize Y = CD+EF+G ? Ans. Y = CD + EF + G for realize this two AND gates are needed (for CD and EF).
what inputcombinations may those hazard take place and how can they be eliminated? F1= AB'' + A''C + BC''D'' F2= AB + A''C''D + AB''D
Define clock rate? The clock rate is given by, R=1/P, where P is the length of single clock cycle.
Explain Pure and impure interpreters In a pure interpreter, the source program is retained into the source form all throughout its interpretation. These arrangements incur subs
In class SlotCollection, remove the fields slot1, slot2, slot3 and slot4 and replace them by an array of slots. Modify the rest of the program to work using this array. There is
Write a 'C' program to accept any 3 digit integer number from the keyboard and display the word equivalent representation of the given number
Q. Illustrate Cache DRAM? Cache DRAM (CDRAM) which is developed by Mitsubishi integrates a tiny SRAM cache (16Kb) on a generic DRAM chip. SRAM on the CDRAM can be used in two
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