Risc architecture - computer architecture, Computer Engineering

Assignment Help:

RISC  architecture - computer architecture:

What is reduced regarding it? The answer of this question is that to make all instructions the equal length the number of bits that are used for the opcode is reduced. Accordingly fewer instructions are provided. The instructions that were thrown out are the less significant string and BCD (binary-coded decimal) operations. Acutely, now that memory access is limited there aren't various kinds of MOV instructions or ADD instructions. Therefore the previous architecture is called CISC (Complete Instruction Set Computer). RISC architectures are also known as LOAD/STORE architectures.

The number of registers in RISC is typically 32 or more. The first the MIPS 2000 and RISC CPU has 32 GPRs as different to 16 in the 68xxx architecture and 8 in the 80x86 architecture. The only disadvantage of RISC is the code size of it. Typically more instructions are required and there is a waste in short instructions (POP, PUSH).

 

 


Related Discussions:- Risc architecture - computer architecture

Evidence of intelligent behavior - artificial intelligence, Evidence of int...

Evidence of intelligent behavior - Artificial Intelligence: Machines mean they could simply be personal computers, or they could be robots with embedded automative systems, or

What are the reasons behind using intranet, Reason behind using Intranet ...

Reason behind using Intranet The major reasons for doing this include: -  Safer as there is less chance of external viruses or hacking -  It's possible to prevent employe

Explain about instruction cycle, Q. Explain about Instruction Cycle? Th...

Q. Explain about Instruction Cycle? The instruction cycle for this provided machine comprises four cycles. Presume a 2-bit instruction cycle code (ICC). The ICC can represent t

List the steps needed to perform page replacement, List the steps needed to...

List the steps needed to perform page replacement. The steps required to perform page replacement are: 1. Find out which page is to be removed from the memory. 2. Perfor

Bubbling the pipeline - computer architecture, Bubbling the Pipeline: B...

Bubbling the Pipeline: Bubbling the pipeline (also known as a pipeline break or pipeline stall) is a technique for preventing, structural, data and branch hazards from taking p

Explain increments and skips subsequent instruction, Q. Explain Increments ...

Q. Explain Increments and skips subsequent instruction? Increments A and skips subsequent instruction if the content of A has become 0. This is a complex instruction then requi

Characteristics of large register file, Characteristics of large-register-f...

Characteristics of large-register-file and cache organizations Large Register File Cache Hold local variables for almost all functio

Illustrate an object model for university system, An object model for unive...

An object model for university system Establishing relationship among various classes in the system is the primary activity. Here, we have a simple model of a University System

Direct or random access of elements, Direct or random access of elements is...

Direct or random access of elements is not possible in:- In Linked list direct or random access of elements is not possible

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd