Risc approach - computer architecture, Computer Engineering

Assignment Help:

RISC Approach - computer architecture:

The RISC processors only use easy instructions that can be executed within one clock cycle. therefore, the "MULT" command discussed above could be divided into three separate commands: 1)"LOAD," which  is used to moves data from the memory bank to a register, 2) "PROD," which is used to finds the product of two operands located within the registers, and  3) "STORE," which is used  moves data from a register to the memory banks. In order to perform the precise series of steps described in the CISC approach, a programmer would require coding 4 lines of assembly:

LOAD A, 2:3

LOAD B, 5:2

PROD A, B

STORE 2:3, A

Firstly, it may seem like a much less competent way of completing the operation. Because there are more lines of code so more RAM is required to store the assembly level instructions. The compiler ought to be performing more work to convert a high-level language statement into the code of this form.

 

 


Related Discussions:- Risc approach - computer architecture

Padovan string , A Padovan string P(n) for a natural number n is defined as...

A Padovan string P(n) for a natural number n is defined as: P(0) = ‘X’ P(1) = ‘Y’ P(2) = ‘Z’ P(n) = P(n-2) + P(n-3), n>2 where + denotes string concatenation. For a string of t

Internal organization of memory chip - computer architecture, Internal Orga...

Internal Organization of memory chip: Word line & bit lines 16x8 organization : 16 words of 8 bits per Form of an array

Processor, what is the difference between i5 and i7 processor?

what is the difference between i5 and i7 processor?

CRTscreen as a two-dimensional matrix, Explain the statement- CRT screen as...

Explain the statement- CRT screen as a two-dimensional matrix One can imagine the CRT screen as a two-dimensional matrix which has m rows and n  columns and this is usually ref

How do you control instructions like branch, How do you control instruction...

How do you control instructions like branch, cause problems in a pipelined processor? Pipelined processor gives the best throughput for sequenced line instruction. In branch in

Two - bit correlating predictor, The history file, history.txt, is the bran...

The history file, history.txt, is the branch history of a run of the gcc compiler (the first field is the address of the branch instruction, the second field is the target branch a

Computer systems architecture, Assume that you are working in a software co...

Assume that you are working in a software company as a programmer and a bank is your company's client. The Bank is a most popular and one of the leading banks in Malaysia. Your

Give difference between top down and bottom up parsing, Give difference bet...

Give difference between top down parsing and bottom up parsing. Top down parsing: Specified an input string, top down parsing tries to derive a string identical to this by s

Handlers classification, Handler's Classification In 1977, Wolfgang Han...

Handler's Classification In 1977, Wolfgang Handler proposed an detailed notation for expressing the parallelism and pipelining of computers. Handler's classification addresses

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd