Risc approach - computer architecture, Computer Engineering

Assignment Help:

RISC Approach - computer architecture:

The RISC processors only use easy instructions that can be executed within one clock cycle. therefore, the "MULT" command discussed above could be divided into three separate commands: 1)"LOAD," which  is used to moves data from the memory bank to a register, 2) "PROD," which is used to finds the product of two operands located within the registers, and  3) "STORE," which is used  moves data from a register to the memory banks. In order to perform the precise series of steps described in the CISC approach, a programmer would require coding 4 lines of assembly:

LOAD A, 2:3

LOAD B, 5:2

PROD A, B

STORE 2:3, A

Firstly, it may seem like a much less competent way of completing the operation. Because there are more lines of code so more RAM is required to store the assembly level instructions. The compiler ought to be performing more work to convert a high-level language statement into the code of this form.

 

 


Related Discussions:- Risc approach - computer architecture

Show various RISC processors, Q. Show Various RISC Processors? RISC has...

Q. Show Various RISC Processors? RISC has fewer design bugs and its simple instructions decrease design time. Sodue to all the above important reasons RISC processors have beco

Differentiate b/w pre-emptive and non-pre-emptive scheduling, Differentiate...

Differentiate between pre-emptive and non-pre-emptive scheduling. Pre-emptive scheduling : in its approach, center processing unit can be taken away from a process if there is a

Background, Background, Examples and Hypothesis: Now we will switch of...

Background, Examples and Hypothesis: Now we will switch off with three logic programs. So very firstly, we will have the logic program representing a set of positive examples

How to develop an object model, How to develop an object model To deve...

How to develop an object model To develop an object model firstly identify classes and their associations, as they affect overall problem structure and approach. Then prepare

Design an or to and gates combinational network, Design an OR to AND gates ...

Design an OR to AND gates combinational network and NAND only n/w for the following Boolean expression: A'BC'D + ABC'D' + A'B'CD' + A'BCD'

Define strategy procedure, Q. Define Strategy Procedure? The strategy p...

Q. Define Strategy Procedure? The strategy procedure is called when loaded into memory by DOS or whenever controlled device request service. The major purpose of the strategy i

Jsbjj, what are the output deice

what are the output deice

Spcc, Disadvantages of macro processor

Disadvantages of macro processor

Define flowchart, Define Flowchart. A  process  of  expressing  an  alg...

Define Flowchart. A  process  of  expressing  an  algorithm  by  a  collection  of  linked  geometric  shapes   containing explanations of the algorithm's steps.

What is hypercube network, Q. What is Hypercube Network? The hypercube ...

Q. What is Hypercube Network? The hypercube architecture has played a significant role in development of parallel processing and is quite influential and popular. The highly sy

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd