Risc approach - computer architecture, Computer Engineering

Assignment Help:

RISC Approach - computer architecture:

The RISC processors only use easy instructions that can be executed within one clock cycle. therefore, the "MULT" command discussed above could be divided into three separate commands: 1)"LOAD," which  is used to moves data from the memory bank to a register, 2) "PROD," which is used to finds the product of two operands located within the registers, and  3) "STORE," which is used  moves data from a register to the memory banks. In order to perform the precise series of steps described in the CISC approach, a programmer would require coding 4 lines of assembly:

LOAD A, 2:3

LOAD B, 5:2

PROD A, B

STORE 2:3, A

Firstly, it may seem like a much less competent way of completing the operation. Because there are more lines of code so more RAM is required to store the assembly level instructions. The compiler ought to be performing more work to convert a high-level language statement into the code of this form.

 

 


Related Discussions:- Risc approach - computer architecture

Calculate the blocking probability of three stage network, A three stage ne...

A three stage network is designed with the following parameters: M=N=512, p = q = 16 and α = 0.65. Calculate the blocking probability of the network, if s=16. Symbols carry th

Vertical alignment of fields one below the other, Which Command permits for...

Which Command permits for vertical alignment of fields one below the other. UNDER Command is used ofr vertical alignment.

Linux, Explain about unix file system architecture

Explain about unix file system architecture

How many instructions in a computer, Q. How many instructions in a Computer...

Q. How many instructions in a Computer? A computer can have a vast number of instructions and addressing modes. Older computers with the growth of Integrated circuit technolog

What is asynchronous dram, What is asynchronous DRAM? In asynchronous D...

What is asynchronous DRAM? In asynchronous DRAM, the timing of the memory device is controlled asynchronously. A specialized memory controller circuit gives the essential contr

Overfitted the data, Overfitted the data: Moreover notice that as time...

Overfitted the data: Moreover notice that as time permitting it is worth giving the training algorithm the benefit of the doubt as more as possible. However that is, the error

Describe about data warehouse development life cycle, Data Warehousing 1....

Data Warehousing 1.  With necessary diagram, Describe about Data Warehouse Development Life Cycle. 2. Elucidate Metadata and what is its use in Data Warehouse Architecture?

Define the register addressing mode, Q. Define the Register Addressing mode...

Q. Define the Register Addressing mode? When operands are taken from registers implicitly or explicitly it is known as register addressing. These operands are termed as regis

Explain the matlab language, This is a high-level matrix/array language wit...

This is a high-level matrix/array language with control flow statements, functions, data structures, input/output, and object-oriented programming features. It permits both "progra

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd