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Replacement policy:
On a particular cache miss we require to evict a line to build room for the new line
"In an A-way set associative cache, we have A option of which block to evict
"Which block will be booted out?
! random
! least-recently utilized (true LRU is too costly)
! pseudo LRU (about LRU - in case of 4-way set associatively 1 bit keeps track of which pair of blocks is LRU, and then tracking which of the block in per pair is LRU (one bit per pair))
! fixed (processing audio stream)
For a 2-way set associative cache, random replacement has a miss rate approximate
1.1 time greater than LRU replacement. As the caches turn into larger, the miss rate for both replacement strategies drop, and the difference becomes little.
Random replacement is sometimes more better than effortless LRU approximations that may be easily implemented in hardware.
WRITE MISS POLICY: Write allocate fetch on write fetch entire block, then write word into block allocate a new block on each writ allocate block, but
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