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PUSH Instruction
This instruction copies the contents of the specified register pair into the stack. The contents of stack pointer register are decremented by two. The instruction format is
PUSH RP
PUSH B - contents of BC register pair are copied into stack.
PUSH D - content DE register pair are copied into stack.
PSUH H - contents of HL registers pair are copied into stack.
Q. A 10-kVA, 200:400-V, single-phase transformer gave these test results: • Open-circuit test (LVwinding supplied): 200V, 3.2 A, 450 W • Short-circuit test (HV winding suppli
Q. Using two 8-to-1multiplexers and one 2-to-1multiplexer, show how a 16-to-1 multiplexer can be obtained in the form of a block diagram.
a) Give four features that were traditionally reserved to RISC architectures? b) Determine the overall throughput for 21 sequential instructions assuming a four-stage pipeline a
What is the maximum memory size that can be addressed by 8086? In 8086, an memory location is addressed by 20 bit address and the address bus is 20 bit address and the address
Second Generation ( 1954- 1964) After the invention of semiconductor devices mainly transistors size of computer s was reduced a lot computing power increased reliability was
P-N Junction A p-n junction is made by joining P-type and N-type semiconductors together in extremely close contact. The word junction consider to the boundary interface
analyse the motion of aircraft
Network analysis software: GIS with a socket for network analysis software (Sec. 11.4) and availability of load related data from AMR based meter data acquisition system will
#I want to get lecture notes on Electronic device.and circuits .
A transistor has (A) One p-n junction. (B) Two p-n junction. (C) Four p-n junction. (D) Five p-n junction. Ans: A transistor has two p-n junctions.
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