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Problem:
(a) What do you understand by the principle of locality of reference and explain how this is exploited in cache design.
(b) Consider a 32-bit microprocessor that has an on-chip 16 kilobyte direct-mapped cache. Assume that the design has a cache line size of four 32-bit words.
Draw a block diagram of this cache showing its organization and how the different address fields are used to determine a cache hit/miss.
Where in the cache is the byte from main memory location ABCDE8F8 mapped?
what is cursor
Explain in detail about the Dynamic timing a. Design is simulated in full timing mode. b. Not all possibilities tested, as it is dependent on input test vectors. c. Simul
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