Potential of parallelism-parallel computing, Computer Engineering

Assignment Help:

Potential of Parallelism

Problems in the actual world differ in respect of the degree of natural parallelism inherent in the personal problem domain. Some problems may be simply parallelized. On the other hand, there are some natural sequential difficulty (for ex: - computation of Fibonacci sequence) whose parallelization is almost impossible. The extent of parallelism may be enhanced by appropriate design of an algorithm to explain the problem consideration. If processes don't split address space and we could remove data dependency among instructions, we can attain higher level of parallelism. The idea of speed up is used as a calculate of the speed up that point out up to what degree to which a sequential program can be parallelised.  Speed up may be occupied as a sort of point of inherent parallelism in a program. In this admiration, Amdahl has specified a law, known as Amdahl's Law, which declare that potential program speedup is distinct by the fraction of code (P) that preserve be parallelised:   

                                                                     2436_Potential of Parallelism.png

If no element of the code can be parallelized, P = 0 and the speedup = 1 i.e. it is an essentially sequential program. If every code is parallelized, P = 1, the speedup is infinite. But basically, the code in no program can made 100% parallel. Hence speed up can never be immeasurable.

If 50% of the code is parallelized, maximum speedup = 2, meaning the code will scamper twice as fast. If we establish the amount of processors performing the parallel fraction of work, the link can be modelled by:

                                                                    1442_Potential of Parallelism 1.png

Where P = parallel fraction, S = serial fraction and N = number of processors. The Table 1 shows the value of speed up for different values P and N.

                                                                        Table 1

                                                                                        Speedup

                                                       --------------------------------

                                                        N          P = .50 P = .90 P = .99

                                                      -----      -------   -------   -------

                                                        10          1.82     5.26     9.17

                                                        100        1.98     9.17     50.25

                                                        1000      1.99     9.91     90.99

                                                        10000    1.99     9.91     99.02

The Table 1 suggest that speed up increase as P increases. However, after a definite Limits N does not have a lot impact on the value of pace up. The reason being that, for N processors to remain dynamic, the code must be, in some way or other, being divisible in, independent part, roughly N parts each part taking almost same total of time.


Related Discussions:- Potential of parallelism-parallel computing

What are the roll and page areas, What are the roll and page areas? Ro...

What are the roll and page areas? Roll and page areas are SAP R/3 buffers used to kept user contexts (process requests).  The SAP dispatcher assigns procedure requests to work

Compiler software difficulty, IA-64 instead depends on the compiler for thi...

IA-64 instead depends on the compiler for this task. Even before the program is fed into the CPU, the compiler studies the code and makes the similar sorts of decisions that would

Define sr flip flop - sr latch with nor gate, Define SR Flip Flop - SR latc...

Define SR Flip Flop - SR latch with NOR Gate? The SR Flip flop neither is a circuit with two cross-coupled NOR gates or two cross-coupled NAND gates. SR

Explain the term - restating the requirements, Restating the Requirements ...

Restating the Requirements To have clarity of analytical model of system you must state requirements specific performance constraints with optimization criteria in one documen

Address phase - computer architecture, Address phase: A PCI bus transa...

Address phase: A PCI bus transaction starts having an address phase. The initiator,  after seeing that it has GNT# and the bus is inactive, drives the target address onto the

Components of information super highway infrastructure, Explain the compone...

Explain the components of Information Super Highway Infrastructure. The Information Superhighway is more than the Internet. It is a sequence of components, having the collectio

Safety argument for good design, So far we have considered the problems of ...

So far we have considered the problems of poor ID in terms of the loss of productivity and efficiency to business. There is another important aspect to consider: the issue of safet

Computer graphics, raster scan and random display technology

raster scan and random display technology

Illustrate why does a tea kettle sing, Q. Illustrate why does a tea kettle ...

Q. Illustrate why does a tea kettle sing? Answer:- There is a little attachment with a hole in it which acts as a whistle. It is inserted into the spout of the kettle as w

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd