Pn-junction under bias, Electrical Engineering

Assignment Help:

Q. pn-Junction under Bias?

Let an external source be connected between the p- and n-regions, as shown in Figure (a). (b) shows the circuit representation of the pn-junction or diode, and its external circuit. The voltage source V, called the bias, either decreases or increases the potential barrier, thereby controlling the flow of carriers across the junction. With V = 0, the barrier is unaffected and the pn-junction has zero current. Positive values of V, known as forward biasing, decrease the potential barrier, thereby increasing the number of electrons and holes diffusing across the junction. The increased diffusion results in a net current, called the forward current, from the p-tothe n-region. With increased V, the forward current further increases rapidly because the barrier is reduced even further.Making V negative (reverse biasing), on the other hand, increases the potential barrier and reduces the number of carriers diffusing across the boundary. The drift component produced by the electric field from the n-tothe p-region causes a small current, called the reverse current (or saturation current) IS. The magnitude of the saturation current depends on the doping levels in the p- and n-type materials and on the physical size of the junction. Increasing the reverse bias, however, does not affect the reverse current significantly until breakdown occurs.

1316_pn-Junction under Bias.png


Related Discussions:- Pn-junction under bias

Find the slip and the rotor frequency at full load, Q. A three-phase, 50-Hz...

Q. A three-phase, 50-Hz induction motor has a full load speed of 700 r/min and a no-load speed of 740 r/min. (a) How many poles does the machine have? (b) Find the slip and t

Explain the magnetisation- curves of magnetic materials, Explain the magnet...

Explain the magnetisation- curves of magnetic materials. The major characteristic of a ferromagnetic substance is domain structure of it. Every crystal of a ferromagnetic subst

Schematic symbols, Schematic Symbols The junction gate field-effect t...

Schematic Symbols The junction gate field-effect transistor or JFET gate is sometimes drawn in the middle of the channel (in place of at the drain or source electrode as in t

Instrumentation, explain measurement of frqueny and phase using cro

explain measurement of frqueny and phase using cro

In given block diagram find geq, Q. Show that the block diagram of Figure c...

Q. Show that the block diagram of Figure can be reduced to the form of Figure. Find G eq (s) and H eq (s).

Induction heating levitation, Using a levitation coil, you levitate a condu...

Using a levitation coil, you levitate a conductive object in the magnetic field and heat within that field. I have 2 sample report and I would like you to write some thing similar

Svd, svd calculation in matrix

svd calculation in matrix

Digital Electronics, Design a MOD-6 synchronous counter using J-K Flip-Flop...

Design a MOD-6 synchronous counter using J-K Flip-Flops.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd