Pipeline processing-parallel computer architecture , Computer Engineering

Assignment Help:

Pipeline Processing

Pipelining is a process to realize, overlapped parallelism in the proposed answer of a problem, on a digital computer in an economical way. To understand the concept of pipelining, we need to understand first the concept of assembly lines in an automated production plant where items are assembled from separate parts (stages) and output of one stage becomes the input to different stage. Taking the analogy of assembly lines, pipelining is the method to introduce temporal parallelism in computer operations. Assembly line is the pipeline and the separate parts of the assembly line are different stages through which operands of an operation are passed.

To introduce pipelining in a processor P, the following steps given below:

  • Sub-divide the input process into a sequence of subtasks. These subtasks will make phases of pipeline, which are also called as segments.
  • Each phase Si of the pipeline according to the subtask will execute some operation on a distinct set of operands.
  • When phase Si has completed its operation, results are gone to the next stage Si+1 for the next operation.
  • The phase Si takes a new set of input from earlier stage Si-1.

In this way, parallelism in a pipelined processor can be achieved like that m independent operation can be present simultaneously in m segments as shown given below:-

                                                       945_Pipeline Processing.png

The phases or section are executed as pure combinational circuits performing logic or arithmetic operations over the data streams flowing through the pipe. Latches are used to divide the phases, which are quick registers to hold intermediate results among the phases as shown in Figure. Each phase Si consists of a processing circuit Ci and a latch Li .  The last output is stored in output register R. The flow of data vary from one stage to another is controlled by a common clock. Therefore, in every clock period, one stage transmits results to another stage.

                                                  438_Pipeline Processing 1.png


Related Discussions:- Pipeline processing-parallel computer architecture

What do you mean by drive cache, Q. What do you mean by Drive Cache? Di...

Q. What do you mean by Drive Cache? Disk cache may be a part of RAM sometimes known as soft disk cache which is used to speed up access time on a disk. In latest technologies s

Fundamental differences between risc and cisc architecture, Q. Fundamental ...

Q. Fundamental differences between RISC and CISC architecture? Fundamental differences between RISC and CISC architecture. The following table lists following differences:

By which analog signal combine with a carrier frequency, Analog signals can...

Analog signals can be              by combining them with a carrier frequency (A)  Carried                                      (B)  Transported (C)  Multiplexed

What is rational administrator, Use the Rational Administrator to: * M...

Use the Rational Administrator to: * Make and manage projects. * Make a project under configuration management. * Make a project outside of configuration management.

Explain that datagram cannot be larger than mtu of a network, "A datagram c...

"A datagram cannot be larger than the MTU of a network over which it is sent." Is the statement true or false? Explain with the help of a suitable example. All hardware technol

What is telex, Telex is a (A)  Telephone Service between various subsc...

Telex is a (A)  Telephone Service between various subscribers (B)  Tele printer Service between various subscribers (C)  Television Service between various subscri

Explain about operand address calculation, Q. Explain about Operand Address...

Q. Explain about Operand Address Calculation? In actual machines effective address can be a register address, memory or I/O port address. Register reference instructions for ex

Explain procedure level of parallel processing, Procedure Level Here, p...

Procedure Level Here, parallelism is obtainable in the form of parallel executable procedures. In that case, design of algorithm plays a key role. E.g. every thread in Java is

Address translation with dynamic partition, Address translation with dynami...

Address translation with dynamic partition : Given figure shows the address translation process with dynamic partitioning, where the processor provides hardware support for

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd