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PRAM is one of the models used for designing the parallel algorithm as given in Figure. The PRAM models have the following components:
PRAM Model
The Following steps are followed by a PRAM model while implementing an algorithm:
i) Read phase: Firstly, the N processors concurrently read data from N different memory locations of the shared memory and subsequently save the read data into its local registers.
ii) Compute phase: After that, these N processors perform the logical or arithmetic operation on the data stored in their local registers.
iii) Write phase: Lastly, the N processors parallel write the computed values from their local registers into the N memory locations of the shared memory.
Ans) UDP TCP SPX
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FORMAT OF HARDWARE ADDRESS: It have of a numeric value and its size is chosen for specific network technology. The length of the message format is one to six bytes.
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