Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Consider the hardware design as shown. Within the target system the EPROM would contain the hex data as shown below
Address Assembly code 8000 86 8001 fe 8002 8b 8003 01 . ......... FFFE 80 FFFF 00 On power on the microprocessor issues a reset which causes the processor to go into an interrupt mode, because the interrupt is a reset, the microprocessor reads the two top bytes from memory i.e fffe and ffff. These are called the initial program counter RESET vectors. In this case the processor would then load in the 16 bit address 8000 and load this directly into the program counter (PC). This causes the processor to jump to address 8000 and start the actual program. The processor then reads the next byte from address 8000; this is 86 Hex and translates it to a load A instruction with immediate data where the data follows in the next byte. The PC is incremented by 1 i.e 8001 and fe in read in . This takes two cycles and termed the 'Fetch cycle'. The next stage is the microprocessor to perform the instruction i.e. transfer the data fe into A, this is termed the 'Execution cycle'. The whole cycle starts again, i.e. the PC is incremented to 8002 and the command 8b (ADDA) is fetched and interpreted as a ADDA, the PC in incremented to 8003 and the data is read in i.e. 1. The command is then executed and the next instruction read in at 8004 and so on. A day in the life of the micro controller is one of fetching and executing. The initial data in the EPROM at address fffe, ffff is termed the reset vector and is an reserved area of memory for the programmers (us) to place vector address i.e. start address of programs to deal with exceptions i.e. Clock Fail, IRQ, Timer output, Serial communications etc.
The full vector table is shown .Although we have not actually used the stack, the emulator which we use to debug hardware/software programs uses a small part of it , therefore it is important that we initialise the stack , therefore the full program for adding two numbers is shown below
Name add P6811 org $8000 ; Start address of program main: Lds #$1ff ; Set SP to top of internal Ram Ldaa #$fe adda #$1 loop0: jmp loop0 ; loop forever org $fffe FDB main ;Reset vectors END The bold sections are termed assembler directives and are used to control the assembler; the simplest ones are ORG which stands for origin, i.e. start code at this address , the P6811 indicates 68HC11 processor and END which tells the assembler to stop. FDB informs the assembler to insert a double byte i.e. 16 bits of the address labelled main i.e. 8000.
Q. Explain about Programmer Visible Registers? Programmer Visible Registers: These registers can be employed by machine or assembly language programmers to minimize reference
General principles of pruning: The general principles are such that: 1. Given a node N that can be chosen by player one, thus if there is another node, X, along any path,
End systems are connected together by communication links. There are various types of communication links, which are made of numerous types of physical media, comprising twisted pa
Define a Gate Fix ASIC-based design in short. Gate Fix ASIC-based design: A Gate Fix implies that a select number of gates and their interconnections may be subtracted or ad
Determine the advantages of sixth generation computers One of the major dramatic changes in sixth generation will be the explosive growth of wide area networking. Network bandw
different types of buses with diagram
Images in the top area of Compass home page guide visitors to specific pages on the site. Now you will add links for navigation buttons. You will see that there are some ways to
Fixed Arithmetic pipelines We obtain the example of multiplication of fixed numbers. The Two fixed-point numbers are added by the ALU using shift and add operations. This sequ
Define asynchronous bus. Asynchronous buses are the ones in which every item being transferred is accompanied by a control signal that shows its presence to the destination uni
What are the types of data warehouses? Various types of data warehouses are illustrated below: a) Financial Data Warehouses b) Insurance Data Warehouses c) Human Resou
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd