Operation of micro controller, Computer Engineering

Assignment Help:

Consider the hardware design as shown. Within the target system the EPROM would contain the hex data as shown below

  Address  Assembly code
  8000             86
  8001             fe
  8002             8b
  8003             01
.  .........
  FFFE             80
  FFFF             00
 
On power on the microprocessor issues a reset which causes the processor to go into an interrupt mode, because the interrupt is a reset, the microprocessor reads the two top bytes from memory i.e fffe and ffff. These are called the initial program counter RESET vectors. In this case the processor would then load in the 16 bit address 8000 and load this directly into the program counter (PC). This causes the processor to jump to address 8000 and start the actual program. The processor then reads the next byte from address 8000; this is 86 Hex and translates it to a load A instruction with immediate data where the data follows in the next byte. The PC is incremented by 1 i.e 8001 and fe in read in . This takes two cycles and termed the 'Fetch cycle'. The next stage is the microprocessor to perform the instruction i.e. transfer the data fe into A, this is termed the 'Execution cycle'. The whole cycle starts again, i.e. the PC is incremented to 8002 and the command 8b (ADDA) is fetched and interpreted as a ADDA, the PC in incremented to 8003 and the data is read in i.e. 1. The command is then executed and the next instruction read in at 8004 and so on. A day in the life of the micro controller is one of fetching and executing. The initial data in the EPROM at address fffe, ffff is termed the reset vector and is an reserved area of memory for the programmers (us) to place vector address i.e. start address of programs to deal with exceptions i.e.  Clock Fail, IRQ, Timer output, Serial communications etc.

The full vector table is shown  .Although we have not actually used the stack, the emulator which we use to debug hardware/software programs uses a small part of it , therefore it is important that we initialise the stack , therefore the full program for adding two numbers is shown below

                   Name     add
                   P6811
                  org $8000    ; Start address of program   
  main:       Lds #$1ff     ; Set SP to top of internal Ram
                 Ldaa  #$fe   
                 adda  #$1   
 loop0:      jmp loop0       ; loop forever
                 org $fffe
                 FDB main    ;Reset vectors
                END
The bold sections are termed assembler directives and are used to control the assembler; the simplest ones are ORG which stands for origin, i.e. start code at this address  , the P6811 indicates 68HC11 processor and END which tells the assembler to stop. FDB informs the assembler to insert a double byte i.e. 16 bits of the address labelled main i.e. 8000.


Related Discussions:- Operation of micro controller

4, Ask question 4#Minimum 100 words accepted#

Ask question 4#Minimum 100 words accepted#

Information security, i wants to know the methods and process of substituti...

i wants to know the methods and process of substitution and transposition cipher with examples.

The job allocation register, Signify this problem by means of: i.    An Ent...

Signify this problem by means of: i.    An Entity Relationship model; ii.    Relational tables. Pete's Programmers is a firm which supplies part time staff on contract to organisat

What is a heap dump, Thread Dump: When we trigger a thread dump on an appli...

Thread Dump: When we trigger a thread dump on an application server, all active thread informations will be deserted into file which is called as thread dump. Here, we can get info

Parallel edge or self loop of the total number of edges, A graph with n ver...

A graph with n vertices will definitely have a parallel edge or self loop of the total number of edges are More than n(n-1)/2

Explain HLL program & execution of machine language program, Give the Schem...

Give the Schematic of Interpretation of HLL program and execution of a machine language program by the CPU. The CPU utilizes a program counter (PC) to notice the address of nex

Interrupt signal interconnection network (isin), Interrupt Signal Interconn...

Interrupt Signal Interconnection Network (ISIN): When a processor wish to transmit an interruption to another processor, then this interrupt initially goes to ISIN, by which it

Manipulating numbers, Computers manipulate numbers - but decimalnumbers wit...

Computers manipulate numbers - but decimalnumbers with digits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 cannot be represented using two states of a digitalcircuit.Instead decimal numbers are co

How many bits must be decoded for 128 × 8 ram chips, How many bits must be ...

How many bits must be decoded for chip select? What is the size of decoder when 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes? Ans. All higher order l

Computer architecture by henessy and patterson, what is initial interval an...

what is initial interval and latency in a functional unit(fp) of a pipeline

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd