New asic design flow, Electrical Engineering

Assignment Help:

There is a requirement to propose a new ASIC design flow within your company, from VHDL design capture through to GDSII tape out.  It is very important that the flow includes all the tools, and you explain all data formats, that will be required.  You should choose an example application design to help with your discussion.

Your report for this assignment should include;

1.    Suggest a design flow (graphically and with an accompanying discussion), to take a design from VHDL to GDSII.

2.    Detail all the tools chosen, together with their suppliers.  Include the features of the tool and the data formats that they will accept, and cost the design flow for implementation.

3.    Explain what an ASIC library comprises, and suggest a suitable technology for your chosen application.  Give recommendations on choosing ASIC libraries for any application.

Provide all references for all relevant material, and be aware that the report will be checked for originality via the TurnItIn software.


Related Discussions:- New asic design flow

Find the quantity of electricity transferred, If a current of 20A flows for...

If a current of 20A flows for five minutes, find the quantity of electricity transferred. Quantity of electricity,   Q = It = 20 x 5 x 60 = 6000C     

Realize the function f by a k map using 0s, Q. Given the following truth ta...

Q. Given the following truth table: (a) Realize the function f by a K map using 0s. (b) Realize the function f by a K map using 1s.

Explain sampling and pulse modulation, Q. Explain Sampling and Pulse Modula...

Q. Explain Sampling and Pulse Modulation? In most analog circuits, signals are processed in their entirety. However, in many modern electric systems, especially those that conv

Segment is used to store interrupt, Which Segment is used to store interrup...

Which Segment is used to store interrupt and subroutine return address registers? Ans) Stack Segment in segment register is used to kept interrupt and subroutine return address

Case 2 a>b - program description, Case 2 ( A>B) Suppose XX = 05H ( stor...

Case 2 ( A>B) Suppose XX = 05H ( stored  in A ) And  YY = 02H ( stored  in B). Then carry  flag will  reset by CMP instruction, since  A> B in this  case JNC  will transfer the

Demonstrate the circuits operation , OBJECTIVES Use an NXT to control ...

OBJECTIVES Use an NXT to control the speed of a DC fan motor. You will us a potentiometer to set the speed and the second fan motor as feedback. Use the circuit from Lab 1 to

Comperators, How to build a 6 bit comparator?

How to build a 6 bit comparator?

Describe CCIT hierarchical structure, Q. Describe CCITT  hierarchical  stru...

Q. Describe CCITT  hierarchical  structure  of  switching  and  routing  using  block schematic.  Ans: Hierarchical network are capable of handling heavy traffic where req

Product of two sinsoids, Connect the two signals used in section 2 above to...

Connect the two signals used in section 2 above to the "Multiplier" module. Make sure that you record the amplitude of each signal. Observe and record the resultant waveform in

Obtain the sop expressions for given k map, Q. The K map of a logic functio...

Q. The K map of a logic function is shown in Figure, in which ds denote don't-care conditions. Obtain the SOP expressions.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd