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Indirect Addressing In this addressing mo e also ne of the operands is the stored in the memory. The memory address of the operand is specified by the register pair.
When both MT 2 and Gate are Negative In this case N 3 works as a remote gate. Current flows form layer P 2 to layer N 3 junction N 1 P 1 is reverse biased and it br
Explain time multiplexed space switching? With a neat diagram illustrate its operation. Ans: Time division switches where an outlet or an inlet corresponded to a single s
The material with lowest resistivity is (A) Constantan. (B) Silver. (C) manganin. (D) nichrome. Ans: The material with lowest resist
what ''s part of dcmotor or dc generator
What is dummy coil?
What is the function performed by SIM instruction in 8085? SIM -Set Interrupt Mask. This instruction masks the interrupts as desired .it also sends out serial data by the seri
Explain the working of an npn transistor. Working of npn transistor: In an npn transistor is demonstrated in the figure. The emitter base junction is forward biased whereas
Q. Consider themagnetic circuit of Figure. Let the cross-sectional area AC of the core, be 16 cm 2 , the average length of the magnetic path in the core lC be 40 cm, the number
Q. A balanced wye-connected load with a per-phase impedance of 4 + j3 is supplied by a 173-V, 60-Hz three-phase source. (a) Find the line current, the power factor, the total
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