Nanoprogramming - computer architecture, Computer Engineering

Assignment Help:

Nanoprogramming:

  •  Second compromise: nanoprogramming
  •  it use a 2-level control storage organization
  •  Top level is a vertical format memory
  •  Output of the top level memory process the address register of the bottom (nano- level) memory
  •  Nanomemory uses the horizontal format
  •  Generate the real control signal outputs
  •  The benefit to this method is significant saving in control memory size (bits)
  •  Disadvantage is more difficulty and slower operation (doing 2 memory accesses for each microinstruction)

Nano programmed machine

1589_Nanoprogramming.png

 

  • Instance : Assume that a system is being designed with 200 control points and 2048 microinstructions

o   Suppose that only 256 different combinations of control points are ever used

o   A single-level control memory would need 2048x200=409,600 storage bits

  •   A nano programmed system would utilize
  •   Microstore of size 2048x8=16k
  •   Nanostore of size 256x200=51200
  •   Total size = 67,584 storage bits
  •   Nano programming has been used in many CISC microprocessors

 


Related Discussions:- Nanoprogramming - computer architecture

Discuss the advantages of expression tree, Discuss its advantages over the ...

Discuss its advantages over the other evaluation techniques. The expression tree is determined by using a post-order traversal of the expression tree as given here: 1. If such

Explain executing request using message-passing architecture, Explain the E...

Explain the Executing Requests Using a Message-Passing Architecture Executing requests using a message-passing architecture requires good fundamental client-server programming

Transaction, Explain Shadow Copy Scheme in detail.

Explain Shadow Copy Scheme in detail.

Describing Random Algorithm, Suppose you''re given n numbers and asked to f...

Suppose you''re given n numbers and asked to find a number that is greater than or equal to the median a) What is the lower bound for the worst case complexity of this problem?

Crafting an isa - computer architecture, Crafting an ISA: We will l...

Crafting an ISA: We will look at some decisions facing an instruction set architect, and In the design of the MIPS instruction set how those decisions were made. MIPS

Which is not a layer of input-output management module, Which is not a laye...

Which is not a layer of IO management module? Ans. MCS that is Management Control System, is not a layer of IO management module.

Dynamic address translation - computer architecture, Dynamic address transl...

Dynamic address translation :  If, when executing an instruction, a CPU fetches an instruction located at a specific virtual address, or fetches data from a particular virtual

What is the difference among a canvas and a scroll panel, Canvas is a compo...

Canvas is a component. ScrollPanel is a container. Canvas is a rectangular area where the application can draw or trap input events. ScrollPane executes horizontal and vertical scr

Calculate the switching elements in a two stage network, In a two stage ne...

In a two stage network there are 512 inlets and outlets, r=s=24. If the probability that a given inlet is active is 0.8, calculate: the switching elements Given: N =M =512,

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd