Nanoprogramming - computer architecture, Computer Engineering

Assignment Help:

Nanoprogramming:

Second compromise: nanoprogramming
it use a 2-level control storage organization
Top level is a vertical format memory
Output of the top level memory process the address register of the bottom (nano- level) memory
Nanomemory uses the horizontal format
Generate the real control signal outputs
The benefit to this method is significant saving in control memory size (bits)
Disadvantage is more difficulty and slower operation (doing 2 memory accesses for each microinstruction)

Nano programmed machine

Instance : Assume that a system is being designed with 200 control points and 2048 microinstructions

o Suppose that only 256 different combinations of control points are ever used

o A single-level control memory would need 2048x200=409,600 storage bits

A nano programmed system would utilize
Microstore of size 2048x8=16k
Nanostore of size 256x200=51200
Total size = 67,584 storage bits
Nano programming has been used in many CISC microprocessors

Related Discussions:- Nanoprogramming - computer architecture

Explain bottom-up parsing techniques, Explain Bottom-up Parsing Techniques ...

Explain Bottom-up Parsing Techniques A parser can begin with the input and attempt to rewrite it to the start symbol. Instinctively, the parser attempts to locate the most bas

Illustrate organisation of dram chip, Q. Illustrate Organisation of DRAM Ch...

Q. Illustrate Organisation of DRAM Chip? The given figure is a typical organisation of 16 mega bit DRAM. It displays a typical organisation of 2048 × 2048 × 4 bit DRAM chip. Me

BCD to gray converter, BCD to gray converter using 2:1 multiplexer

BCD to gray converter using 2:1 multiplexer

What are the 3 things that are needed to specify a route, 1. URL Pattern - ...

1. URL Pattern - You can contain placeholders in a URL pattern so that variable data can be passed to the request handler without having a query string. 2. Handler - The handle

Why is translation look-aside buffers important, Why is Translation Look-as...

Why is Translation Look-aside Buffers (TLBs) important? The implementation of page-table is completed in the following manner: Page table is maintained in main memory.

Show the liability of cpu in interrupt cycle, Q. Show the liability of CPU ...

Q. Show the liability of CPU in interrupt cycle? In the interrupt cycle the liability of CPU/Processor is to ensure whether any interrupts have happened checking presence of in

Disadvantages of pipeline - computer architecture, Disadvantages of pipelin...

Disadvantages of pipeline: Pipeline architecture has 2 major disadvantages. First is its complexity and second is the inability to constantly run the pipeline at full speed,

Speed of memory versus speed of CPU, In the past there was a large gap betw...

In the past there was a large gap between speed of a memory andprocessor. So a subroutine execution for an instruction for illustration floating point addition may have to follow a

Using the editor or debugger, Write a script that will read from a file x a...

Write a script that will read from a file x and y data points in the following format: x 0 y 1 x 1.3 y 2.2 x 2.2 y 6 x 3.4 y 7.4 The format of each line in the

Make a generalize program to performs r-ary subtraction, Q. Make a genera...

Q. Make a generalize program that performs r-ary subtraction on two numbers using (r-1)'s and r's complement? Use input and output files.

Write Your Message!

Name

Email id

Message

Verfication Code

User Account

All Pages