Multiprocessor DSP Systems
Over modern times several organizations have provided forums made up of several DSPs. More lately, semiconductor organizations have been providing snacks including several DSP applications on just one die. Illustrations of such into-grated multiprocessor DSPs include over the counter available products such as the Arizona Equipment TNETV3020 multi-DSP [Tex08], Philips PRIMEDIA brand [RS98], and the Flexible Alternatives CNAPS brand. The Hydra research at Stanford [HO98] is another example of an attempt targeted on single-chip multiprocessors.
Multiprocessor DSPs are likely to be popular at some point for a wide range of reasons. First, VLSI technology today allows one to "stamp" thousands of conventional DSP processor chips onto a single die; this pattern is certain to continue in the future. Such a strategy is predicted to become progressively more eye-catching because it lowers the confirmation and examining time for the progressively more complicated VLSI systems of the long run.
Second, since such a system is automated, pedaling, examining, and cover up costs of developing an ASIC (application-specific incorporated circuit) for each different program is stored by using such a system for many different programs. This benefit of DSPs is going to be progressively more important as routine incorporation levels precede their extraordinary incline, thus empowering a lot of DSPprocessors to be incorporated on a single nick, while the cost of developing customized ASICS in modern production technological innovation is growing.
Third, although there has been unwillingness in using computerized compilers for included DSPs, such similar DSP products create the use of computerized resources feasible; with a lot of brand chips per nick, one can manage to give up some producing power to the issues in the computerized resources. In addition, new techniques are being investigated to create the process of instantly applying style onto several brand chips more efficient - the research results mentioned in this book are also efforts in that route. This situation is similar to how sense developers have accepted computerized sense functionality resources these days - sense functionality resources and VLSI technology have enhanced to the point that the nick area stored by guide style over computerized style is not worth the extra style time involved: one can manage to "waste" a few entrance, just as one can manage to waste a limited amount of brand periods to system issues in a multiprocessor DSP system.
Finally, a growth of telecom requirements and indication codec's, often giving rise to several requirements for the very same application, makes application rendering extremely attractive. Examples of programs in this classification include set-top boxes capable of realizing a wide range of audio/video codec's and pressure requirements, locations assisting several requirements, multimode phones and base stations that work with several mobile requirements, multi-media work stations that are required to run a wide range of different multi-media application products, and automated audio/video codec's. Incorporated multiprocessor DSP systems provide a very versatile application foundation for this rapidly-growing family of programs.
A normal generalization of such fully-programmable, multiprocessor incorporated tour is the type of multiprocessor techniques that is made up of an arbitrary- perhaps heterogeneous - selection of automated processor chips as well as resource of zero or more customized components on just one nick. Applying programs onto such structure is then a hardware/software co-design problem.
However, the problems of interprocessor interaction and synchronization are, for the most part, similar to those experienced in fully-programmable methods. In this publication, when we talk about a "multiprocessor", we will simply and structure that, as described above, may be consists of different kinds of automated processor snacks, and may involve customized components. In addition, the multiprocessor methods that we deal with in this publication may be manufactured in a single incorporated routine nick, or may be spread across several snacks. All of the methods that we provide in this publication use to this common type of similar producing architectures.