Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Multiple bus architecture:
One solution to the bandwidth restriction of a single bus is to simply add extra buses. Consider the architecture indicated in given figure that contains N processors, P1 P2 PN, each containing its own private cache, and all linked to a shared memory by B buses BB, B1, B2. The shared memory consists of M interleaved banks M1 M2,MM to permit simultaneous memory requests concurrent access to the shared memory. It ignores the loss in performance that happen if those accesses have to be serialized, which is the case when there is only 1 memory bank. Each processor is linked to every bus and so is each memory bank. When a processor requires accessing a specific bank, it has B buses from which to select. Therefore each processor- memory pair is linked by various redundant paths, which implies that the failure of 1 or more paths can, principally, be tolerated at the cost of some degradation in system performance.
In a multiple bus system many processors may try to access the shared memory simultaneously. To deal with this problem, a policy might be implemented that allocates the available buses to the processors making requests to memory. In particular case, the policy might deal with the case when the number of processors exceeds from the B. For performance point of view this allocation has to be performed by hardware arbiters which, as we will see, add significantly to the difficulty of the multiple bus interconnection networks.
PCout, R=B, MARin, Read, IncPC
what are the domains of artificial intelligence
Discuss the advantages of automatic switching systems over manual switching system. Automatic switching systems have some advantages over the manual exchanges: 1. In a manua
Performance Equation of computer system: Following equation is frequently used for expressing a computer's performance ability: The CISC approach tries to minimize the
How exceptions are handled in java? Exception handing In Java: A java exception is an object which describes an exceptional condition which has occurred in a piece of code.
Q. Sorting Circuit along with Odd-Even Merging Circuit? The merge sort algorithm needs two circuits which imply that one circuit for merging and another circuit for sorting the
What is difference between collaboration on task and event management? Web-based task management application let the user handle the multiple pieces and parts of large projects
what is opcode for addition and subtraction
Explain topology method used in LAN technology in detail. LAN Topologies: Network topology is a physical schematic that shows interconnection of the various users. There are
why partition and mounting is needed
Define a register. Ans: Register: A register contain a group of flip-flops and gates which effect their transition. The flip flops hold the binary information and the g
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd