Modes of 8254-microprocessor, Assembly Language

Assignment Help:

Modes of 8254 :

 

1632_modes of 8254.jpg

Mode 0 (Interrupt on Terminal Count)-GATE which value is 1 enables counting and GATE  which value is 0 disables counting, and GATE put not effect on OUT. The contents of the CR are transferred to CE on the first CLK pulse after CR is written into by the processor, unrelated of the signal on the GATE pin. Pulse that loads CE is not included in the count. OUT would low when there is an output to the control register and remains low till the count goes to 0.Primarily, Mode 0 is for event counting.

Mode 1 (Hardware Re -triggerabic  One-Shot)-After  CR has been loaded  with N, a 0-to-1  transition  on GATE will cause CE to be loaded, a one-to-zero transition  at OUT, and the count to start. When the count reaches to zero OUT will go high so producing a negative-going OUT pulse N clock periods long.

Mode 2 (Periodic Interval Timer)-after loading CR with N, a transfer is occur from CR to CE on the next clock pulse. OUT goes from one  to zero when the count becomes one and remains low for o1 CLK pulse; then it returns to 1 and CE is reloaded from CR, so  giving a negative pulse at OUT after each N clock cycles. GATE that value 1 enables the count and GAT that value is 0 disables the count. A 0-to-1 transition on GATE also causes the count to be reinitialized on the next clock pulse. This mode is utilized to provide a programmable periodic interval timer.

Mode 3 (Square-Wave Generator)-It is likewise to mode 2 except that OUT goes low when half the first count is reached and remains low till the count becomes zero. So the duty cycle is changed. As like before, GATE enables and disables the count and a zero to one transition on GATE reinitializes the count. This mode can be utilized for baud rate generation.

Mode 4 (Software-Triggered  Strobe)-It is likewise to mode 0 except that OUT is high while the counting is taking place and generate a one-clock-period negative pulse when the count reaches zero.

Mode 5 (Hardware-Triggered Strobe-Retriggerabic)-After CR is loaded, a O-to-I transition on GATE will cause a transfer from CR to CE during the next CLK pulse. OUT will be high in the time counting but will go low for one CLK period when the count becomes zero. GATE may reinitialize counting at any time.

For all modes, if the starting count is zero, it will be interpreted as216 or104 depending on the format of the count. The above descriptions were just to provide a whole idea of the operation of the 8254 in the several modes.

 

 


Related Discussions:- Modes of 8254-microprocessor

Or-logical instruction-microprocessor, OR: Logical OR: The OR instruction ...

OR: Logical OR: The OR instruction carries out the OR operation in the similar way as described in case of the AND operation. The restriction on source and destination operands ar

Assignment, You have to write a subroutine (assembly language code using NA...

You have to write a subroutine (assembly language code using NASM) for the following equation. Dx= ax2+(ax-1)+2*(ax+2)/2

NASM assembly language programming, NASM assembly language program: Consid...

NASM assembly language program: Consider a sequence of 19 strictly positive decimal digits, most likely stored in an array. There are obviously duplicates, and the sequence is un

Opcode-microprocessor, Opcode : The opcode generally appear in the firs...

Opcode : The opcode generally appear in the first byte.but in a few instructions, a register objective is in the first byte and few other instructions may have their 3-bits of

Hi, i have a question.

i have a question.

maximim and minimum mode 8088-microprocessor, Maximim and Minimum mode 808...

Maximim and Minimum mode 8088 system : In the maximum mode, the pin 880 is lastingly high. The functions and timings of other pins of 8088 are exactly similar to 8086. Due to t

Queue operation-microprocessor, Queue Operation :   RQ/CT0, RQ...

Queue Operation :   RQ/CT0, RQ/G1-Request/Grant:   These pins are utilized by other local bus masters, in themaximum mode, to force the processor to release the loca

Intel 8259 interrupt controller-microprocessor, Intel 8259 interrupt contro...

Intel 8259 interrupt controller :  The 8088 processor has only two interrupt control inputs, and interrupt request (INTR) and non mask able interrupt (NMI). NMI are interrupts t

Call-unconditional branch instruction-microprocessor, CALL : Unconditional...

CALL : Unconditional Call:- This instruction is utilized to call a subroutine from a basic program. In case of assembly language programming, the term procedure is utilized int

End-endp-assemblers directive-microprocessor, END : END of Program:- Th...

END : END of Program:- The END directive marks the ending of the assembly language program. When the assembler comes across this END directive, it avoided the source lines avai

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd