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MIPS - computer architecture:
The MIPS ISA, so far
3 instruction formats
Fixed 32-bit instruction
3-operand, load-store architecture
32 general-purpose register (floating point, integer)
R0 always equal 0
Register are 32 -bits wide (word)
2-speacial purpose register LO & HI, because division and multiply generate more then 32-bits
Register instant and base+ displacement addressing mode.
Artificial Intelligence 1. Explain about artificial intelligence? What are the achievements of AI? 2. Elaborate state space search briefly. 3. Prove that A* is optimal.
Identify at least eight milestones for this project. Write a one-page paper describing each milestone using the SMART criteria?
what is the source code
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