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MIPS - computer architecture:
The MIPS ISA, so far
3 instruction formats
Fixed 32-bit instruction
3-operand, load-store architecture
32 general-purpose register (floating point, integer)
R0 always equal 0
Register are 32 -bits wide (word)
2-speacial purpose register LO & HI, because division and multiply generate more then 32-bits
Register instant and base+ displacement addressing mode.
Problem 1. Explain briefly the process of matching production rules against working memory 2. What are the different kinds of knowledge that need to be represented in AI? Ex
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