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MIPS - computer architecture:
The MIPS ISA, so far
3 instruction formats
Fixed 32-bit instruction
3-operand, load-store architecture
32 general-purpose register (floating point, integer)
R0 always equal 0
Register are 32 -bits wide (word)
2-speacial purpose register LO & HI, because division and multiply generate more then 32-bits
Register instant and base+ displacement addressing mode.
Compare excess 3 codes and gray code. Ans. Excess 3 Codes 1. This is the other form of BCD code. All decimal digits are coded in 4 bit binary code. 2. The code
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BIOS or Basic Input/Output System is the first program accessed by the processor during start up to make sure that all the other basic programs, hard drives, ports, peripherals and
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Q. What is Flash Memory? This memory is other form of semiconductor memory that was first introduced in mid-1980. These memories can be reprogrammed at high speed and therefo
Explain the Race Around Condition? Consider the inputs of the JK flipflop j=1 and k=1 and Q=0 when a clock pulse of width tp is applied the output will change from 0 to 1 after
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kcl & kvl
Address symbol table is generated by the (A) memory management software. (B) assembler. (C) match logic of associative memory. (D) generated by operating system
Associativity of Connectives : Here brackets are very important in order to tell us where to perform calculations in arithmetic and logic. By using these brackets we evaluate
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