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MIPS - computer architecture:
The MIPS ISA, so far
3 instruction formats
Fixed 32-bit instruction
3-operand, load-store architecture
32 general-purpose register (floating point, integer)
R0 always equal 0
Register are 32 -bits wide (word)
2-speacial purpose register LO & HI, because division and multiply generate more then 32-bits
Register instant and base+ displacement addressing mode.
Organisational Inertia - Obstacle To Information System This is most easily understood as problems of change and culture. Like any change process technology led change will be
The octal equivalent of (247) 10 is ? Ans. (247) 10 = (367) 8
Q. Describe about general-purpose microprocessor? Keeping rapidity with electronics as more and more components were fabricated on a single chip fewer chips were required to ma
Control Unit (CU) : Every PEs are under the control of one control unit. CU controls the inter communication among the PEs. There is a local memory of CU also known as CY memory.
Prove the following Boolean identities using the laws of Boolean algebra (A + B)(A + C) = A + BC Ans. (A+B)(A+C)=A+BC LHS AA+AC+AB+BC=A+AC+AB+BC OR A((C+1)+A(B+1))+BC
Detemine the major building blocks of UML UML could be used in visualizing, specifying, constructing and documenting object oriented systems. The major building blocks of UML a
start 100 A Ds 3
Differentiate between Batch Operating System and Time Sharing Operating System? Batch operating systems : A batch is a sequence of jobs. Such batch is submitted to batch proce
Q. Observations of High Level Language Program? Observations Integer constants appeared nearly as frequently as structures or arrays. Most of the scalars were foun
Conventionally software has been written for serial computation in that programs are written for computers which have a single Central Processing Unit (CPU). Here the problems are
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