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MIPS - computer architecture:
The MIPS ISA, so far
3 instruction formats
Fixed 32-bit instruction
3-operand, load-store architecture
32 general-purpose register (floating point, integer)
R0 always equal 0
Register are 32 -bits wide (word)
2-speacial purpose register LO & HI, because division and multiply generate more then 32-bits
Register instant and base+ displacement addressing mode.
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Internal Organization of memory chip: Word line & bit lines 16x8 organization : 16 words of 8 bits per Form of an array
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homework help.
Explain the term - Strong Typing and Weak Typing Strong Typing : When any operation upon an object can be checked during compile time, when type is confirmed forcefully.
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