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There are formal ways of reducing Boolean expressions in order to minimize the logic circuit. The two elementary ways of minimization are using Boolean expressions/De Morgan Theorem (math's approach) or Karnaugh maps (Graphical approach). The first is simply a set of mathematical rules, which help us eliminate redundant terms in out expression. Let us have a closer look. The simplest Identities are shown below: A +1 = 1 A .1 = A A .A = A A +A = A /A + A =1 /A . A = 0 These are common sense since from the OR truth table we can see that if B is always 1 then the output is the same always 1.
Hence if in an expression we see A+1 we can replace 1. The same applies to the remaining identities.
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There are formal ways of reducing Boolean expressions in order to minimize the logic circuit. The two elementary ways of minimization are using Boolean expressions/De Morgan Theore
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