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Q. Obtain a block diagram of a shift-left/right register using D flip-flops. Q. Design a 4-bit universal shift register. Q. (a) Show a block diagram of an SRFF connected to s
Q. A transmission line with a dielectric (εr = 3.5) is 100 m long. At a frequency of 10 GHz, how many wavelengths long is the line?
Q. The inductance per unit length in H/mfor parallel plate in?nitely long conductors in air is given by L = µ 0 d/w = 4π×10 -7 d/w, where d and w are inmeters.Compute L (per unit
Q. A two-winding, single-phase transformer rated 3 kVA, 220:110 V, 60 Hz is connected as an autotransformer to transform a line input voltage of 330 V to a line output voltage of 1
A 500 MVA, 33kv, three phase steam turbine generator has a synchronous reactance of 1.6 p.u. It delivers a rated output at 0.8 power factor lagging. Calculate (a) The synchronou
shunt generation explain....
For the circuit of Fig: (i) using Kirchoff's Laws , find all the currents (ii) determine the voltage across each resistor and check that all loops comply with KVL (iii
Q. Aconical horn has a side viewas shown in Figure The maximum value ofthe directive gain is given by GD ∼ = 5.13(D/λ) 2 , where D =√3.33λL1 and L1 = L/(1-d/D),in which d is the i
Draw the re-model for the circuit given in figure and calculate: a). The input impedance (β=100), b). The output impedance (r0 = 50 kΩ) and c). The mid-band collector-base
Explain the signals HOLD, READY and SID HOLD indicates that a peripheral such as DMA controller is requesting the use of address bus, data bus and control bus. READY is used to
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