Make your simulation run faster, Computer Engineering

Assignment Help:

Ameliorating the mechanical delays of seeks and rottion are usually regardeed as major aspects of device drivers for disks. The simplest way for a disk device driver to service disk IO requests is First Come First Served. However, most disk driver software instead uses the "elevator algorithm". If there is no IO request pending, the first request is serviced. If, however, there is at least one request pending, then the disk arm has a direction of movement: inward or outward from the ddisk spindle. Two ordered listsof pending IO requests are maintained: those that can sstill be serviced while the disk arm continues its current direction, and those that must be seerviced after the disk arm changes direction and sweeps back across the disk. IL requests are serviced in order of cylindr number, when there are no further pending IO requestts in the direction the disk arm has been moving, the disk arm reverses direction and starts servicing IO requests that had been behind it. IO requests may arrive while the arm is sweeping, and such requests are sorted into one of the two lists as appropriate.
A) To quantify the benefit of using the elevator algorithm, simulate the disk driver handling IO requests and compute the average and median service time if the requests were handled FCFS and the average and median time if the requests were handled by the elevator algorithm. Comment on the ratio between the FCFS and elevator algorithm results. 

Assume a typical modern disk has about 16000 cylkinders, that the time for the arm to seek the full width of the disk is 5 milliseconds, and that the disk rotates at 7200 rpm. but because of rotational position sensing, after seeking to the appropriate cylinder an IO request only needs to wait for otational delay from the end of where the previous IO request was serviced to the start of where the next IO request is to be serviced. Assume tht the seek time is proportional to the number of
cylinders that must be crossed from the cylinder where the previous IO request was serviced to the cylindeer where the next IO request is to be serviced. (Measurement on any real disk shows this model is incorrect, but close enough for our purpose.)
Assume that the load of IO requests arrive at exponentially distributed distributed time intervals with mean 1 millisecond, that the cylinder distribution is 25% from the swap space (and, for Unix File System, the inode space) that occupies a few cylinders in the middle of the disk but that otherwise the cylinder distribution of IO requests is uniform, and that the length of the dta transfer of an IO request is lognormal, with median 1k bytes and scale parameter 1. Simulate enough IO requests that your averages have less than 1% error.

B) One way to make your simulation run faster, expecially now that almost all personal computers have at least dual cores, would be to wrrite your program as multi-threadd. Regardless of whether you actually have access to a multi-thread environment, indicate where in your program you would have to insert concurrency control (say semaphores) in order to avoid critical races.


Related Discussions:- Make your simulation run faster

How do we synthesize verilog into gates with synopsys, How do we synthesize...

How do we synthesize Verilog into gates with Synopsys?  The answer can, of course, occupy various lifetimes to completely answer.. BUT.. a straight-forward Verilog module can b

Interaction design and human–computer interaction, You should now have a re...

You should now have a reasonably clear understanding of what is meant by interaction design. However, there are several other terms which are often used to refer to particular aspe

Lexical analyser, The aim of this project is for you to construct a fully w...

The aim of this project is for you to construct a fully working compiler for a small simple programming language, SPL. The compiler will read in SPL source code and produce ANSI C

Floating-point processing and instruction encoding, write a program that e...

write a program that evaluate the following arithmetic expression: ((A+B) /C) * ((D-A)+E) assign test value to the variable and display the resulting value.

Explain asynchronous decade counter, Draw the circuit diagram of Asynchrono...

Draw the circuit diagram of Asynchronous decade counter and explain its working. Ans: To  design  a  circuit diagram of decade  asynchronous  counter  initially  we  dr

List one advantage & disadvantage of having large block size, List one adva...

List one advantage and one disadvantage of having large block size. Ans: Advantage: By using a huge block of memory is maximum process's accommodation that resulting is less no

Explain the boolean equations for logic circuits, Explain The Boolean Equat...

Explain The Boolean Equations for Logic Circuits? A Boolean equation is the mathematical representation of a logic circuit using standard Boolean terms. All the logic gates (AND,

What is parallel loop construct, Q. What is Parallel Loop Construct? Pa...

Q. What is Parallel Loop Construct? Parallel loop construct is a shortcut for specifying parallel construct comprising one loop construct and no other statements. The syntax of

Explain in brief about the broadband, Explain in brief about the broadband ...

Explain in brief about the broadband It isn't just computers which can be linked without wires, different peripheral devices can be linked to a computer system without the need

How to reduce the maximum quantization error, In successive-approximation A...

In successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter's output. This is done to ? Ans. It is done to reduce the maximum quantiz

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd