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Question:
a) What is the main difference between a latch and a flip flop?
b) Draw the logic diagram of an SR-latch using only NAND gates.
c) A positive edge triggered J-K flip flop with preset and clear inputs is shown below. Determine Q and for the inputs shown by the timing diagram.
d) Draw a BCD asynchronous decade counter (which counts from 0000 to 1001) with asynchronous active low clear and negative edge triggered clock.
few
Determine the active - reactive and apparent power: In the given circuit, determine the active, reactive and apparent power. Figure Solution The inductive
A 440-V, 60-Hz, six-pole, wye-connected, squirrel-cage induction motor with a full-load speed of 1170 r/min has the following parameters per phase referred to the stator: R 1 = 0.
explanation
Q. Two wattmeters are used, as shown in Figure, to measure the power absorbed by a balanced delta-connected load. Determine the total power in kW, the power factor, and the per-pha
TRANSISTOR CONFIGURATIONS: Transistor circuits may be categorized into three configurations based on which terminal is common to both of the input and output of circuit. Th
Q. Show a block diagram of a 4-bit, parallel-input shift-right register and briefly explain its operation.
What are advantages of segmentation ? However because the segment register is 16 bit broad and the memory requires 20 bits for an address the 8086 appends 4 bits segment reg
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FET operation: Figure: I-V characteristics and output plot of a JFET n-channel transistor. The FET manages the flow of electrons (or electron holes) from the sourc
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