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NOR Gate:
Figure shows a further example of a 2 input digital gate, again consisting of two NPN transistors, TR1 and TR2, in a different configuration. When input A and input B are both at the 0 state (0v), both transistors are biased OFF and the output will adopt the 1 state (+ 5v). If input A only is given the 1 state, transistor TR1 will be biased ON and current will flow, making the output take up the 0 state. Similarly, if input B only is given the 1 state, transistor TR2 will be biased ON, taking the output to the 0 state. Finally if both input A and input B are at the 1 state together, the output will again adopt the 0 state.
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If all states are measured by appropriate sensors and interfaced to the flight control computer then allthe states may be fed back and there is no restriction on the choice of K. S
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